• 대한전기학회:학술대회논문집
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• 대한전기학회 2011년도 제42회 하계학술대회
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• pp.1214-1215
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• 2011

현재 HVDC 및 FACTS와 같은 전력전자소자 기반 전력기기의 최신 개발은 능동형 스위치소자의 발전 및 설치 환경의 변화로 인하여 VSC Topology로 이동되고 있다. 하지만 VSC Toplolgy의 스위칭 손실등의 문제로 대용량 전력기기의 경우 MMC(Modular Multilevel Converter) 적용이 가속화되고 있다. 이에 본 논문에서는 MMC Topology의 특징, 구동 원리, 시뮬레이션 과정을 소개한다. Modulation 및 Quantization 그리고 Sorting Algorithm을 통해 7-level, 151-level 삼상 MMC Topology을 시뮬레이션을 수행하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2020년도 전력전자학술대회
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• pp.253-254
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• 2020

High Voltage Direct Current (HVDC) 시스템은 고압 직류송전을 위한 시스템이다. 고압 직류 송전을 위해서는 전력변환기가 교류전력을 직류전력으로 변환해주어야 하는데, 최근에는 모듈형 멀티레벨 컨버터(Modular Multilevel Converter, MMC)가 많이 적용되고 있다. MMC는 다수의 서브모듈이 직렬로 구성되어 있으며 DC-link단에 대용량 커패시터가 없다. MMC의 심각한 사고 중에 하나는 DC측 전력케이블의 단락사고로 시스템에 따라서 수십 kA 정도의 사고전류가 AC측 CB(Circuit Breaker)가 열리기 전까지 수십 ms에서 수백 ms동안 흐른다. 만약 하프브릿지 회로의 서브모듈로 구성된 컨버터에 별도 보호장치가 없으면 단락전류는 서브모듈의 하단 다이오드를 통해서 흐르게 되어 소손되게 된다. 이를 방지하기 위해 단락전류를 바이패스(by-pass) 시키기 위한 별도의 사이리스터를 추가하는데 이 기기의 사양은 DC 단락 전류를 충분히 견딜 수 있어야 한다. 본 논문에서는 사이리스터의 서지 전류 내력을 평가하기 위해 사양을 분석하고 시뮬레이션과 실험을 통해서 검증하였다.

• Journal of Power Electronics
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• 제19권6호
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• pp.1496-1504
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• 2019

This paper proposes a new THD reduction algorithm for modular multilevel converters (MMCs) with offset voltage injection operated in nearest level modulation (NLM). High voltage direct current (HVDC) is actively introduced to the grid connection of offshore wind powers, and this paper deals with a voltage generation technique with an MMC for wind power generation. In the proposed method, third harmonic voltage is added for reducing the THD. The third harmonic voltage is adjusted so that each of the pole voltage magnitudes maintains a constant value with a maximum number of (N+1) levels, where N is the number of sub-modules per arm. By using the proposed method, the THD of the output voltage is mitigated without increasing the switching frequency. In addition, the proposed method has advantageous characteristics such as simple implementation. As a part of this study, this paper compares the THD results of the conventional method and the proposed method with offset voltage injection to reduce the THD. In this paper, simulations have been carried out to verify the effectiveness of the proposed scheme, and the proposed method is implemented by a HILS (Hardware in the Loop Simulation) system. The obtained results show agreement with the simulation results. It is confirmed that the new scheme achieved the maximum level output voltage and improved the THD quality.

• 전기학회논문지
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• 제63권12호
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• pp.1640-1648
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• 2014

This paper proposes a switching frequency reduction method for MMC (Modular Multilevel Converter) utilizing redundancy operation of sub-module, which can offer reduction of voltage harmonics and switching loss. The feasibility of proposed method was verified through computer simulations with PSCAD/EMTDC software. Based on simulation analysis, a hardware scaled-model of 10kVA, DC-1000V MMC was designed and manufactured in the lab. Various experiments were conducted to verify the feasibility of proposed method in the actual hardware system. The hardware scaled-model can be effectively utilized for analyzing the performance of MMC according to the modulation scheme and redundancy operation.

• Journal of Power Electronics
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• 제19권2호
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• pp.529-539
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• 2019

The modular multilevel converter (MMC) has become a promising topology for high-voltage direct current (HVDC) transmission systems. To control a MMC system properly, the ac-side current, circulating current and submodule (SM) capacitor voltage are taken into consideration. This paper proposes a low-computation indirect model predictive control (IMPC) strategy that takes advantages of the conventional MPC and has no weighting factors. The cost function and duty cycle are introduced to minimize the tracking error of the ac-side current and to eliminate the circulating current. An optimized merge sort (OMS) algorithm is applied to keep the SM capacitor voltages balanced. The proposed IMPC strategy effectively reduces the controller complexity and computational burden. In this paper, a discrete-time mathematical model of a MMC system is developed and the duty ratio of switching state is designed. In addition, a simulation of an eleven-level MMC system based on MATLAB/Simulink and a five-level experimental setup are built to evaluate the feasibility and performance of the proposed low-computation IMPC strategy.

• Journal of Power Electronics
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• 제16권2호
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• pp.522-531
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• 2016

This paper proposes a new NLC (Nearest Level Control) scheme for MMCs (Modular Multilevel Converters), which offers voltage ripple reductions in the DC capacitor of the SM (Sub-Module), the output voltage harmonics, and the switching losses. The feasibility of the proposed NLC was verified through computer simulations. Based on these simulation results, a hardware prototype of a 10kVA, DC-1000V MMC was manufactured in the lab. Experiments were conducted to verify the feasibility of the proposed NLC in an actual hardware environment. The experimental results were consistent with the results obtained from the computer simulations.

• Journal of Power Electronics
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• 제19권6호
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• pp.1486-1495
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• 2019

Dealing with the DC link fault poses a technical problem for an HVDC based on a modular multilevel converter. The fault suppressing mechanisms of several sub-module topologies with DC fault current blocking capacity are examined in this paper. An improved half-bridge sub-module topology with double direction control switch is also designed to address the additional power consumption problem, and a sub-module topology called hybrid double direction blocking sub module (HDDBSM) is proposed. The DC fault suppression characteristics and sub-module capacitor voltage balance problem is also analyzed, and a self-startup method is designed according to the number of capacitors. The simulation model in PSCAD/EMTDC is built to verify the self-startup process and the DC link fault suppression features.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2019년도 전력전자학술대회
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• pp.350-351
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• 2019

High Voltage Direct Current (HVDC) 시스템은 고압 직류 송전을 위한 시스템이다. 고압 직류 송전을 위해서는 전력변환기가 교류전력을 직류전력으로 변환해주어야 하는데, 최근에는 모듈형 멀티레벨 컨버터(Modular Multilevel Converter, MMC)가 많이 적용되고 있다. 모듈형 멀티레벨 컨버터는 단위 서브모듈이 직렬로 구성되어야 하는데 기구적으로 하나의 밸브 구조물에 6개의 서브모듈이 일정한 간격을 두고 위치하게 된다. 모듈형 멀티레벨 컨버터의 특징 중에 하나는 예비모듈이 구성되어 가용율을 높일 수 있다는 것이다. 본 논문에서는 서브모듈의 IGBT 폭파에 의해 발생되는 플라즈마가 주변 서브모듈에 도달해 절연파괴를 발생시키는지 확인하였다.

• 전기전자학회논문지
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• 제23권4호
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• pp.1218-1223
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• 2019

HVDC 시스템에서 풀-브리지 서브 모듈 구조는 하프브리지 서브 모듈에 비해 부품 수가 증가하지만 100 % 여유율 확보가 가능하여 고장률을 크게 줄일 수 있다. 그러나 풀-브리지 서브 모듈은 여유율 보장과 암(arm) 단락 방지를 위한 데드 타임(dead-time)을 확보하기 위해 복잡한 제어 알고리즘이 필요하다. 이 문제를 해결하기 위해 풀-브리지 서브 모듈과 동일한 부품 수와 100 % 여유율을 갖는 병렬 하프브리지 구성의 고장률을 분석한다. 기존의 부품 고장 분석에 고장나무분석 방법을 적용하여 서브 모듈의 동작 위험을 반영함으로써 서브 모듈의 수명주기를 보다 정확하게 예측할 수 있다. 병렬 하프브리지 서브모듈의 타당성 검증을 위해 FTA 기반 분석 방법과 기존의 PCA 기반 방법으로 분석된 고장률을 비교한다.

• Journal of Power Electronics
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• 제18권6호
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• pp.1683-1696
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• 2018

Under the conventional control strategy, the asymmetry of arm impedances may result in the poor operating performance of modular multilevel converters (MMCs). For example, fundamental frequency oscillation and double frequency components may occur in the dc and ac sides, respectively; and submodule (SM) capacitor voltages among the arms may not be balanced. This study presents an enhanced control strategy to deal with these problems. A mathematical model of an MMC with asymmetric arm impedance is first established. The causes for the above phenomena are analyzed on the basis of the model. Subsequently, an enhanced current control with five integrated proportional integral resonant regulators is designed to protect the ac and dc terminal behavior of converters from asymmetric arm impedances. Furthermore, an enhanced capacitor voltage control is designed to balance the capacitor voltage among the arms with high efficiency and to decouple the ac side control, dc side control, and capacitor voltage balance control among the arms. The accuracy of the theoretical analysis and the effectiveness of the proposed enhanced control strategy are verified through simulation and experimental results.