• JSTS:Journal of Semiconductor Technology and Science
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• 제1권3호
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• pp.189-192
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• 2001

A simple metal-insulator-metal (MIM) capacitor in a standard $0.25{\;}\mu\textrm{m}$ digital CMOS process is described. Using all six interconnect layers, this capacitor exploits both the lateral and vertical electrical fields to increase the capacitance density (capacitance per unit area). Compared to a conventional parallel plate capacitor in the four upper metal layers, this capacitor achieves lower parasitic substrate capacitance, and improves the capacitance density by a factor of 4. Measurements and an extracted model for the capacitor are also presented. Calculations, model and measurements agree very well.

• 대한전자공학회논문지TC
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• 제45권8호
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• pp.114-120
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• 2008

본 논문에서는 단락 개방 Calibration (SOC) 방법을 이용하여 MIM 구조로 구성된 커패시터의 기생 소자 값들을 추출하였다. Strip line 으로 구성된 short, open, MIM 구조들의 산란 파라미터 행렬들은 전자기 시뮬레이터 및 벡터 네트웍 분석기를 이용하여 측정되었다. 전자기 시뮬레이션들은 3차원 구조 해석에 적합해왔던 유한 유소법 (FEM)을 이용하여 수행되었다. 적층 구조 내부에 형성된 MIM 커패시터의 전자기 영향들은 집중 소자들로 구성된 II 형 등가 회로로 제안되었고, 2 포트 네트웍 해석을 수행함으로써, 측정된 산란 파라미터들과 등가회로 소자들 간의 관계를 보였다. 제안된 SOC 방법을 이용하여 추출된 집중 소자들은 주파수 독립적인 결과를 나타낸다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.1061-1064
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• 2003

In this paper, we deposited A1$_2$O$_3$ thin film using atomic layer deposition(ALD) method on Ti and fabricated metal-insulator-metal(MIM) capacitor. In the result of this study, the typical deposition rate was about 1.12$\AA$/cycle. About 30 nm of Ti was consumed during deposition and TiO$_{x}$ was formed at the interface of A1$_2$O$_3$ and Ti. Its surface roughness was 1.54nm. The leakage current density was 1.5 nA/$\textrm{cm}^2$. The temperature coefficient of capacitance(TCC) of MIM capacitor was 41 ppm/$^{\circ}C$ at 1MHz and 100 ppm/$^{\circ}C$ at 100 kHz.z.

• 한국전기전자재료학회논문지
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• 제14권12호
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• pp.1016-1022
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• 2001

This study presents the microstructure-electrical property relationship of reactive-sputtered Ta$_2$O$_{5}$ MIM capacitor structure processed by annealing in a vacuum and $O_2$ ambience. A microstructural investigation showed the existence of amorphous phase in as-deposited condition and the formation of preferentially oriented-Ta$_2$O$_{5}$ in $700^{\circ}C$ annealing. On annealing under the $O_2$ atmosphere, the Ta$_2$O$_{5}$ film exhibited the trend of its composition\`s approaching to stoichiometry from off-stoichiometry, analyzed by EPMA, the leakage current decrease and the enhanced temperature-capacitance characteristic stability. In the case of low temperature vacuum-annealing treatment, the leakage current behavior was stable irrespective of applied electric field. In the high temperature-annealed film at a vacuum condition, the electrical properties was observed to deteriorate. The results state that in Ta$_2$O$_{5}$ film annealed at $O_2$ atmosphere, gives rise to improvement of electrical characteristics in the capacitor were improved by reducing oxygen-vacancy and dandling Ta-O bond.-O bond.

• 한국진공학회지
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• 제18권1호
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• pp.30-36
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• 2009

투명 전자소자의 고유전 $HfO_2$ 절연막을 개발하기 위하여, ITO/$HfO_2$/ITO 금속-절연체-금속 (Metal-Insulator-Metal, MIM) 커패시터 구조를 형성한후 $HfO_2$ 박막의 두께에 따른 전기적, 광학적, 구조적 특성의 변화를 연구하였다. $HfO_2$ 박막의 두께가 50 nm에서 300 nm로 증가함에 따라 유전상수는 20에서 10이하로 감소하였으나, $HfO_2$ 두께가 증가함에 따라 누설전류는 감소하여 200 nm 이상의 두께에서는 $2.7{\times}10^{-12}\;A/cm^2$ 이하의 낮은 누설전류 특성을 나타내었다. ITO/$HfO_2$/ITO MIM 커패시터의 $HfO_2$ 박막의 두께가 50 nm에서 300 nm로 증가함에 따라 투과율은 감소하였으나 300 nm 두께에서도 가시광선 영역에서 80% 이상의 투과율을 나타내어 우수한 투과도 특성을 나타내었다.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2008년도 추계종합학술대회 B
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• pp.640-643
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• 2008

In this work, a novel tunable MIM capacitor with the meshed electrode is proposed first in order to improve the tunability characteristics using fringe fields. The capacitors were fabricated on a low-resistivity Si substrate employing lead zinc niobate (PZN) thin film dielectric. The fabricated capacitor with the meshed electrode, whose line width and spacing was $2.5{\mu}m$, achieved the effective capacitance tunability of 31 % that is higher value of 18.5 % than that of the conventional capacitor with the rectangular-type electrode.

• 한국ITS학회 논문지
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• 제7권5호
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• pp.97-105
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• 2008

반도체 공정의 미세화 및 마이크로 시스템 기술의 발전 그리고 소형 무선PAN 및 이동통신 장치들의 급증으로 인하여 전자부품들의 소형화와 직접화에 대한 요구가 지속적으로 증가되고 있다. 본 연구에서는 휴대형 무선PAN 및 이동통신용 전자회로 설계에 다양한 목적으로 널리 사용되고 있는 기저대역의 수동소자들 중 미세 커패시터의 안정성과 전기적 특성을 확보하기 위하여, 유전체인 AIN을 사용하여 MIM구조로 제작된 미세 박막 커패시터 소자의 전기적인 특성을 분석하고 기저대역에서의 성능을 평가한다. 또한 제작된 미세 박막형 커패시터의 용량제어 방법을 제시함으로서 기저대역에서 범용으로 사용할 수 있는 미세 박막 커패시터의 모델을 제시하고자 한다. 또한, 주파수 대역에 따른 MIM구조의 AIN 커패시터 특성을 분석함으로서 향후 임베디드 소자와 집적화를 위한 고정밀의 미세수동 소자로서의 활용방안을 제시하고자한다.

• 한국전기전자재료학회논문지
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• 제17권3호
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• pp.283-288
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• 2004

We have fabricated MIM capacitors for MMIC applications, with capacitances as high as 600pF/$\textrm{mm}^2$ and excellent electrical properties of the insulator layer. Silicon nitride thin film is the desirable material for MMIC capacitor fabrication. Standard MIM capacitance in MMIC is 300pF/$\textrm{mm}^2$ with an insulator layer thickness of more than 2000$\AA$. However, capacitors with thin insulator layers have breakdown voltages as low as 20V. We have deposited insulator layers by PECVD in our MIM structure with an air bridge between the top metal and the contact pad. The PECVD process was optimized for fabricating the desired capacitors to be used in MMIC. Silicon nitride(Si$_{x}$N$_{y}$) thin films of about 1000$\AA$ thick show capacitances of about 600pF/$\textrm{mm}^2$, and breakdown voltages above 70V at 100nA.A.A.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.1
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• pp.412-415
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• 2003

[ $Si_3N_4$ ] thin film is the good material to fabricate the capacitors at MMIC processes. Normally, $Si_3N_4$ thin films is used to dielectric in the MIM capacitor and film thickness is $2000\;{\AA}$. Insulator(or dielectric) was deposited by PECVD at our MIM structure with air bridge which connect between top metal and contact pad. We optimized PECVD process to fabricate the good capacitors which can be applied at the true MMIC. The thickness of our $Si_3N_4$ thin films was $1000\;{\AA}$ shallower than $2000\;{\AA}$, and their breakdown voltages were above 70V.

• 반도체디스플레이기술학회지
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• 제20권4호
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• pp.167-170
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• 2021

Integrated passive device (IPD) technology has emerged with the need for 5G. In order to integrate and miniaturize capacitors inside IPD, various studies are actively performed using high-k materials and trench structures. In this paper, an EM(Electromagnetic) simulation study was performed by applying an oxide dielectric to the capacitors having a various trench type structures. Commercially available materials HfO₂, Al₂O₃, and Ta₂O₅ are applied to non, circle, trefoil, and quatrefoil type trench structures to confirm changes in each material or structure. As a result, the bigger the capacitor area and the higher dielectric constant of the oxide dielectric, the insertion loss tended to decrease.