• 제목/요약/키워드: MEMS device

검색결과 255건 처리시간 0.024초

슈퍼 칩 구현을 위한 헤테로집적화 기술 (Ultimate Heterogeneous Integration Technology for Super-Chip)

  • 이강욱
    • 마이크로전자및패키징학회지
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    • 제17권4호
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    • pp.1-9
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    • 2010
  • 삼차원 집적화기술의 현황과 과제 및 향후에 요구되어질 새로운 삼차원 집적화기술의 필요성에 대해 논의를 하였다. Super-chip 기술이라 불리우는 자기조직화 웨이퍼집적화 기술 및 삼차원 헤테로집적화 기술에 대해 소개를 하였다. 액체의 표면장력을 이용하여지지 기반위에 다수의 KGD를 일괄 실장하는 새로운 집적화 기술을 적용하여, KGD만으로 구성된 자기조직화 웨이퍼를 다층으로 적층함으로써 크기가 다른 칩들을 적층하는 것에 성공을 하였다. 또한 삼차원 헤테로집적화 기술을 이용하여 CMOS LSI, MEMS 센서들의 전기소자들과 PD, VC-SEL등의 광학소자 및 micro-fluidic 등의 이종소자들을 삼차원으로 집적하여 시스템화하는데 성공하였다. 이러한 기술은 향후 TSV의 실용화 및 궁극의 3-D IC인 super-chip을 구현하는데 필요한 핵심기술이다.

메타 물질을 이용하여 소형화와 주파수 가변이 가능한 영차 공진 안테나 (Frequency Tunable and Miniaturized Zeroth-Order Resonant(ZOR) Antenna Design by Metamaterial)

  • 장영수;최재혁;임성준
    • 한국전자파학회논문지
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    • 제21권8호
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    • pp.900-904
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    • 2010
  • 본 논문에서는 주파수 가변이 가능한 영차 공진 안테나를 구현하였다. 제안된 안테나의 영차 공진 특성은 composite right/left-handed(CRLH) 전송 선로를 이용하여 구현하였고, 안테나의 소형화를 극대화하기 위해 버섯 구조의 접지 평면에 사각 슬롯을 설계하였다. 또한, 주파수 가변을 위해 슬롯이 있는 접지 평면에 가변 소자를 삽입하였다. 슬롯이 있는 접지 평면에 위치한 가변 소자의 on/off 상태에 따라, CRLH 전송 선로의 병렬 인덕턴스 값을 변화시킴으로 인해 안테나의 공진 주파수가 바뀌게 된다. 실험 결과, 제안된 안테나의 공진 주파수는 4.92 GHz에서 2.96 GHz로 변했다. 한편, 제안된 안테나의 크기는 일반적인 반파장 패치 안테나보다 최대 94.24 % 크기를 감소시킬 수 있었다.

$DMD^{TM}$를 이용한 마이크로 광 조형 시스템에서 다이나믹 패턴 생성 및 구동에 관한 연구 (A Study on Generation and Operation of Dynamic Pattern at Micro-stereolithography using $DMD^{TM}$)

  • 김현수;최재원;하영명;권변호;원명호;이석희
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2005년도 춘계학술대회 논문집
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    • pp.1214-1218
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    • 2005
  • As demands for precision parts are increased, existing methods to fabricate them such as MEMS, LIGA technology have the technical limitations like high precision, high functionality and ultra miniaturization. A micro-stereolithography technology based on $DMD^{TM}$(Digital Micromirror Device) can meet these demands. In this technology, STL file is the standard format as the same of conventional rapid prototyping system, and 3D part is fabricated by stacking layers that are sliced as 2D section from STL file. Whereas in conventional method, the resin surface is cured as scanning laser beam spot according to the section shape, but in this research, we use integral process which enables to cure the resin surface at one time. In this paper, we deal with the dynamic pattern generation and $DMD^{TM}$ operation to fabricate micro structures. Firstly, we address effective slicing method of STL file, conversion to bitmap, and dynamic pattern generation. Secondly, we suggest $DMD^{TM}$ operation and optimal support manufacturing for $DMD^{TM}$ mounting. Thirdly, we examine the problems on continuous stacking layers, and their improvements in software aspects.

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초소형 고밀도 정보저장장치를 위한 고종횡비의 팁을 갖는 정전 구동형 폴리 실리콘 프로브 어레이 개발 (Electrostatically-Driven Polysilicon Probe Array with High-Aspect-Ratio Tip for an Application to Probe-Based Data Storage)

  • 전종업;이창수;최재준;민동기;전동렬
    • 한국정밀공학회지
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    • 제23권6호
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    • pp.166-173
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    • 2006
  • In this study, a probe array has been developed for use in a data storage device that is based on scanning probe microscope (SPM) and MEMS technology. When recording data bits by poling the PZT thin layer and reading them by sensing its piezoresponse, commercial probes of which the tip heights are typically shorter than $3{\mu}m$ raise a problem due to the electrostatic forces occurring between the probe body and the bottom electrode of a medium. In order to reduce this undesirable effect, a poly-silicon probe with a high aspect-ratio tip was fabricated using a molding technique. Poly-silicon probes fabricated by the molding technique have several features. The tip can be protected during the subsequent fabrication processes and have a high aspect ratio. The tip radius can be as small as 15 nm because sharpening oxidation process is allowed. To drive the probe, electrostatic actuation mechanism was employed since the fabrication process and driving/sensing circuit is very simple. The natural frequency and DC sensitivity of a fabricated probe were measured to be 18.75 kHz and 16.7 nm/V, respectively. The step response characteristic was investigated as well. Overshoot behavior in the probe movement was hardly observed because of large squeeze film air damping forces. Therefore, the probe fabricated in this study is considered to be very useful in probe-based data storages since it can stably approach toward the medium and be more robust against external shock.

SnO2를 이용한 CO 및 NOx 가스 감지 센서 제작 및 특성 연구 (Fabrication and Evaluation of the SnO2 Based Gas Sensor for CO and NOx Detection)

  • 김만재;이유진;안효진;이상훈
    • 한국자동차공학회논문집
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    • 제23권5호
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    • pp.515-523
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    • 2015
  • In this paper, we fabricated and evaluated the gas sensor for the detection of CO gas and $NO_X$ gas among the vehicle exhaust emission gasses. The $SnO_2$ (tin dioxide) layer is used as the detection material, and the thin-film type and the nano-fiber type layers are deposited with various thicknesses using sputtering method and electro spinning method, respectively. The experiments are performed in the chamber where the gas concentration is controlled with mass flow controller. The fabricated devices are applied to the CO and $NO_X$ gas, where the device with the thinner $SnO_2$ layer shows better sensitivity. The nano-fiber has the larger surface area, and the shorter response time and recovery time are obtained. From the experimental results, both types of gas sensors successfully detect CO and $NO_X$ gases, which can be applied to measure those gases from the vehicle emissions.

3-D Hetero-Integration Technologies for Multifunctional Convergence Systems

  • 이강욱
    • 마이크로전자및패키징학회지
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    • 제22권2호
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    • pp.11-19
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    • 2015
  • Since CMOS device scaling has stalled, three-dimensional (3-D) integration allows extending Moore's law to ever high density, higher functionality, higher performance, and more diversed materials and devices to be integrated with lower cost. 3-D integration has many benefits such as increased multi-functionality, increased performance, increased data bandwidth, reduced power, small form factor, reduced packaging volume, because it vertically stacks multiple materials, technologies, and functional components such as processor, memory, sensors, logic, analog, and power ICs into one stacked chip. Anticipated applications start with memory, handheld devices, and high-performance computers and especially extend to multifunctional convengence systems such as cloud networking for internet of things, exascale computing for big data server, electrical vehicle system for future automotive, radioactivity safety system, energy harvesting system and, wireless implantable medical system by flexible heterogeneous integrations involving CMOS, MEMS, sensors and photonic circuits. However, heterogeneous integration of different functional devices has many technical challenges owing to various types of size, thickness, and substrate of different functional devices, because they were fabricated by different technologies. This paper describes new 3-D heterogeneous integration technologies of chip self-assembling stacking and 3-D heterogeneous opto-electronics integration, backside TSV fabrication developed by Tohoku University for multifunctional convergence systems. The paper introduce a high speed sensing, highly parallel processing image sensor system comprising a 3-D stacked image sensor with extremely fast signal sensing and processing speed and a 3-D stacked microprocessor with a self-test and self-repair function for autonomous driving assist fabricated by 3-D heterogeneous integration technologies.

스마트 파이로테크닉스 점화장치 개발 (Devlopment of Smart Pyrotechnic Igniter)

  • 이응조
    • 한국추진공학회:학술대회논문집
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    • 한국추진공학회 2007년도 제29회 추계학술대회논문집
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    • pp.252-255
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    • 2007
  • 최근에 선진국에서 아주 빠른 시간(마이크로 초)에 작동이 되고, 크기가 소형이면서, 많은 케이블과 커넥터를 사용하지 않는 Smart Bus Controller(SCB) 기법을 이용한 초소형/초고속(스마트) 점화기술에 집중적인 연구를 진행하고 있는 실정이다. 이와 같은 점화기술은 기존의 점화장치에서 사용하던 케이블과 커넥터 공간을 최소화 할 수 있게 MEMS 기법을 이용하여 케이블과 커넥터 장치를 설계 제작하였고, 저 용량/저 전류에서 작동할 수 있는 플라즈마를 이용한 케이블과 커넥터 장치를 설계 제작하였고, 저 용량/저 전류에서 작동할 수 있는 플라즈마를 이용한 초고속 착화장치를 사용하여 전류와 전압(배터리) 크기와 용량도 많이 감소시킬 수 있다. 스마트 파이로테크닉스 점화장치 개발에는 간결한 회로 점화통제장치 설계 및 제작, 빠른 점화작동시간을 가능하게 하는 플라즈마형 초고속 착화장치 설계 및 특성연구가 필요하다. 본 연구에서는 플라즈마형 초고속 착화장치의 특성연구에 대해 기술하였다.

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IoT 적용을 위한 다종 소자 전자패키징 기술 (Heterogeneous Device Packaging Technology for the Internet of Things Applications)

  • 김사라은경
    • 마이크로전자및패키징학회지
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    • 제23권3호
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    • pp.1-6
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    • 2016
  • IoT 적용을 위해서는 다종 소자를 높은 connectivity 밀도로 집적화시키는 전자패키징 기술이 매우 중요하다. FOWLP 기술은 입출력 밀도가 높고, 소자의 집적화가 우수하고, 디자인 유연성이 우수하여, 최근 개발이 집중되고 있는 기술이다. 웨이퍼나 패널 기반의 FOWLP 기술은 초미세 피치 RDL 공정 기술과 몰딩 기술 개발이 최적화 되어야 할 것이다. 3D stacking 기술 특히 웨이퍼 본딩 후 TSV를 제조하는 방법(via after bonding)은 가격을 낮추면서 connectivity를 높이는데 매우 효과적이라 하겠다. 하지만 저온 웨이퍼 본딩이나 TSV etch stop 공정과 같이 아직 해결해야할 단위 공정들이 있다. Substrate 기술은 두께를 줄이고 가격을 낮추는 공정 개발이 계속 주목되겠지만, 칩과 PCB와의 통합설계(co-design)가 더욱 중요하게 될 것이다.

비정질 실리콘 희생층을 이용한 니켈산화막 볼로미터 제작 (Fabrication of Nickel Oxide Film Microbolometer Using Amorphous Silicon Sacrificial Layer)

  • 김지현;방진배;이정희;이용수
    • 센서학회지
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    • 제24권6호
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    • pp.379-384
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    • 2015
  • An infrared image sensor is a core device in a thermal imaging system. The fabrication method of a focal plane array (FPA) is a key technology for a high resolution infrared image sensor. Each pixels in the FPA have $Si_3N_4/SiO_2$ membranes including legs to deposit bolometric materials and electrodes on Si readout circuits (ROIC). Instead of polyimide used to form a sacrificial layer, the feasibility of an amorphous silicon (${\alpha}-Si$) was verified experimentally in a $8{\times}8$ micro-bolometer array with a $50{\mu}m$ pitch. The elimination of the polyimide sacrificial layer hardened by a following plasma assisted deposition process is sometimes far from perfect, and thus requires longer plasma ashing times leading to the deformation of the membrane and leg. Since the amorphous Si could be removed in $XeF_2$ gas at room temperature, however, the fabricated micro-bolomertic structure was not damaged seriously. A radio frequency (RF) sputtered nickel oxide film was grown on a $Si_3N_4/SiO_2$ membrane fabricated using a low stress silicon nitride (LSSiN) technology with a LPCVD system. The deformation of the membrane was effectively reduced by a combining the ${\alpha}-Si$ and LSSiN process for a nickel oxide micro-bolometer.

실리콘 게이트전극을 갖는 고온소자와 금속 게이트전극을 갖는 P형 저온 다결정 실리콘 박막 트랜지스터의 전기특성 비교 연구 (A Research About P-type Polycrystalline Silicon Thin Film Transistors of Low Temperature with Metal Gate Electrode and High Temperature with Gate Poly Silicon)

  • 이진민
    • 한국전기전자재료학회논문지
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    • 제24권6호
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    • pp.433-439
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    • 2011
  • Poly Si TFTs (poly silicon thin film transistors) with p channel those are annealed HT (high temperature) with gate poly crystalline silicon and LT (low temperature) with metal gate electrode were fabricated on quartz substrate using the analyzed data and compared according to the activated grade silicon thin films and the size of device channel. The electrical characteristics of HT poly-Si TFTs increased those are the on current, electron mobility and decrease threshold voltage by the quality of particles of active thin films annealed at high temperature. But the on/off current ratio reduced by increase of the off current depend on the hot carrier applied to high gate voltage. Even though the size of the particles annealed at low temperature are bigger than HT poly-Si TFTs due to defect in the activated grade poly crystal silicon and the grain boundary, the characteristics of LT poly-Si TFTs were investigated deterioration phenomena those are decrease the electric off current, electron mobility and increase threshold voltage. The results of transconductance show that slope depend on the quality of particles and the amplitude depend on the size of the active silicon particles.