• Title/Summary/Keyword: M-PHY

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PHY Frame Structure Design for M2M Direct Communications (M2M 단말간 직접통신을 위한 PHY 프레임구조 설계)

  • Oh, Changyoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.2
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    • pp.20-26
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    • 2013
  • We propose PHY Frame Structure for M2M direct communications in licensed frequency band. Especially, the proposed PHY Frame Structure coexists in the same licensed frequency band as currently operating cellular systems. Recently, Machine to Machine (M2M) service markets, including SmartGrid, Mobile Health, and Smart Car, are being rapidly expanded. Supporting M2M services in a specific case can waste Radio Resource in cellular systems. For example, when two M2M terminals communicating to each other are closely located, direct communication is radio resource efficient. In this paper, we set the requirement of maintaining the existing PHY frame structure in cellular systems to meet the backward compatibility. Based on this backward compatibility requirement, PHY frame structure for M2M direct communications is developed while satisfying coexistence with current operating cellular system. The proposed PHY frame structure meets backward compatibility. Accordingly, it is expected that the proposed M2M frame structure is useful for its frequency resource efficiency.

Development of The M-PHY AFE Block Using Universal Components (범용 부품을 이용한 M-PHY AFE Block 개발)

  • Choi, Byung Sun;Oh, Ho Hyung
    • Journal of the Semiconductor & Display Technology
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    • v.14 no.2
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    • pp.67-72
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    • 2015
  • For the development of UFS device test system, M-PHY specifications should be matched with MIPI-standard which is analog signal protocol. In this paper, the implementation methodology and hardware structure for the M-PHY AFE (Analog Front End) Block was suggested that it can be implemented using universal components without ASIC process. The testing procedure has a jitter problem so to solve the problems we using ASIC process, normally but the ASIC process needs a lot of developing cost making the UFS device test system. In is paper, the suggestion was verified by the output signal which was compared to the MIPI-standard on the Prototype-board using universal components. The board was reduced the jitter on the condition of HS-TX and 5.824 Gbps Mode in SerDes (Serialize-deserializer). Finally, the suggestion and developed AFE block have a useful better than ASIC process on developing costs of the industrial UFS device test system.

Low Power Design of a MIPI Digital D-PHY for the Mobile Signal Interface (모바일 기기 신호 인터페이스용 MIPI 디지털 D-PHY의 저전력 설계)

  • Kim, Yoo-Jin;Kim, Doo-Hwan;Kim, Seok-Man;Cho, Kyoung-Rok
    • The Journal of the Korea Contents Association
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    • v.10 no.12
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    • pp.10-17
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    • 2010
  • In this paper, we design digital D-PHY link chip controling DSI (Display Serial Interface) that meets MIPI (Mobile Industry Processor Interface) standard. The D-PHY supports a high-speed (HS) mode for fast data traffic and a low-power (LP) mode for control transactions. For low power consumption, the unit blocks in digital D-PHY are optionally switched using the clock gating technique. The proposed low power digital D-PHY is simulated and compared with conven tional one about power consumption on each transaction mode. As a result, power consumptions of TX, RX, and total in HS mode decrease 74%, 31%, and 50%, respectively. In LP mode, power reduction rates of TX, RX, and total are 79%, 40%, and 51.5%, separately. We implemented the low power MIPI D-PHY digital chip using $0.13-{\mu}m$ CMOS process under 1.2V supply.

Biological Control of Phytophthora palmivora Causing Root Rot of Pomelo Using Chaetomium spp.

  • Hung, Phung Manh;Wattanachai, Pongnak;Kasem, Soytong;Poaim, Supatta
    • Mycobiology
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    • v.43 no.1
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    • pp.63-70
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    • 2015
  • Phytophthora diseases have become a major impediment in the citrus production in Thailand. In this study, an isolate of Phytophthora denominated as PHY02 was proven to be causal pathogen of root rot of Pomelo (Citrus maxima) in Thailand. The isolate PHY02 was morphologically characterized and identified as Phytophthora palmivora based on molecular analysis of an internal transcribed spacer rDNA sequence. This work also presents in vitro evaluations of the capacities of Chaetomium spp. to control the P. palmivora PHY02. As antagonists, Chaetomium globosum CG05, Chaetomium cupreum CC3003, Chaetomium lucknowense CL01 inhibited 50~61% mycelial growth, degraded mycelia and reduced 92~99% sporangial production of P. palmivora PHY02 in bi-culture test after 30 days. Fungal metabolites from Chaetomium spp. were tested against PHY02. Results showed that, methanol extract of C. globosum CG05 expressed strongest inhibitory effects on mycelial growth and sporangium formation of P. palmivora PHY02 with effective dose ED50 values of $26.5{\mu}g/mL$ and $2.3{\mu}g/mL$, respectively. It is interesting that C. lucknowense is reported for the first time as an effective antagonist against a species of Phytophthora.

Determination of buildup factors for some human tissues using both MCNP5 and Phy-X / PSD

  • Mohammad M. Alda'ajeh;J.M. Sharaf;H.H. Saleh;Mefleh S. Hamideen
    • Nuclear Engineering and Technology
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    • v.55 no.12
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    • pp.4426-4430
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    • 2023
  • In this article, Exposure Buildup Factor(EBF) and the Energy Absorption Buildup Factor(EABF) have been determined for blood, brain, and muscle using the Monte Carlo method which is represented by MCNP5 codes and compared with geometric progression(G-P) fitting method which is represented by Phy-X/PSD online platform. The novelty of the present work is used an energy source of less than 0.1 MeV to determine buildup factors using MCNP5 and using Phy-X/PSD for some human tissues. thus, the energy range used in this case study was 0.06-3 MeV for penetration depths covered 0.5-3 MFP. Results of MCNP5 and Phy-X/PSD are validated against reference values of water that were reported at ANS-6.4.3. present results of EABFs and EBFs for the previously mentioned human tissues appeared good agreement between MCNP5 in comparison with Phy-X/PSD, whereas, the maximum average relative deviation did not exceed 2.37%. results of our article can be used in different medical applications, such as brachytherapy, radiotherapy, and diagnostics.

A 1.248 Gb/s - 2.918 Gb/s Low-Power Receiver for MIPI-DigRF M-PHY with a Fast Settling Fully Digital Frequency Detection Loop in 0.11 ㎛ CMOS

  • Kim, Sang-Yun;Lee, Juri;Park, Hyung-Gu;Pu, Young Gun;Lee, Jae Yong;Lee, Kang-Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.4
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    • pp.506-517
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    • 2015
  • This paper presents a 1.248 Gb/s - 2.918 Gb/s low-power receiver MIPI-DigRF M-PHY with a fully digital frequency detection loop. MIPI-DigRF M-PHY should be operated in a very short training time which is $0.01{\mu}s$ the for HS-G2B mode. Because of this short SYNC pattern, clock and data recovery (CDR) should have extremely fast locking time. Thus, the quarter rate CDR with a fully digital frequency detection loop is proposed to implement a fast phase tracking loop. Also, a low power CDR architecture, deserializer and voltage controlled oscillator (VCO) are proposed to meet the low power requirement of MIPI-DigRF M-PHY. This chip is fabricated using a $0.11{\mu}m$ CMOS process, and the die area is $600{\mu}m{\times}250{\mu}m$. The power consumption of the receiver is 16 mW from the supply voltage of 1.1 V. The measured lock time of the CDR is less than 20 ns. The measured rms and peak jitter are $35.24ps_{p-p}$ and $4.25ps_{rms}$ respectively for HS-G2 mode.

A 2.496 Gb/s Reference-less Dual Loop Clock and Data Recovery Circuit for MIPI M-PHY (2.496Gb/s MIPI M-PHY를 위한 기준 클록이 없는 이중 루프 클록 데이터 복원 회로)

  • Kim, Yeong-Woong;Jang, Young-Chan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.5
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    • pp.899-905
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    • 2017
  • This paper presents a reference-less dual loop clock and data recovery (CDR) circuit that supports a data rate of 2.496 Gb/s for the mobile industry processor interface (MIPI) M-PHY. An adaptive loop bandwidth scheme is used to implement the fast lock time maintaining a low time jitter. To this scheme, the proposed CDR consists of two loops for a frequency locked loop and a phase locked loop. The proposed 2.496 Gb/s reference-less dual loop CDR is designed using a 65 nm CMOS process with 1.2 V supply voltage. The simulated peak-to-peak jitter of output clock is 9.26 ps for the input data of 2.496 Gb/s pseudo-random binary sequence (PRBS) 15. The active area and power consumption of the implemented CDR are $470{\times}400{\mu}m^2$ and 6.49 mW, respectively.

Performance of SUN and WiFi P2P for M2M Communication (사물지능통신을 위한 SUN과 WiFi P2P의 성능)

  • Oh, Eui-Seok;Hwang, Seung-Hoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38C no.9
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    • pp.740-745
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    • 2013
  • This paper presents BER, FER performance comparison, especially on PHY mode of IEEE 802.15.4g and IEEE 802.11 under AWGN channel through a simulation, which is communication method using identical frequency bandwidth in M2M environment. This considers suitable communication method of required parameter. It is advantageous that FSK method is used in situations where the system require low complexity and inexpensive structure. And OFDM method is considered for system performance. Further, when the high throughput and various traffic characteristics of the system are required, it can be considered that the method of IEEE 802.11 OFDM PHY mode is used.

A 3-GSymbol/s/lane MIPI C-PHY Transceiver with Channel Mismatch Correction Circuit (채널 부정합 보정 회로를 가진 3-GSymbol/s/lane MIPI C-PHY 송수신기)

  • Choi, Seokwon;Song, Changmin;Jang, Young-Chan
    • Journal of IKEEE
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    • v.23 no.4
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    • pp.1257-1264
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    • 2019
  • A 3-GSymbol/s/lane transceiver, which supports the mobile industry processor interface (MIPI) C-physical layer (PHY) specification version 1.1, is proposed. It performs channel mismatch correction to improve the signal integrity that is deteriorated by using three-level signals over three channels. The proposed channel mismatch correction is performed by detecting channel mismatches in the receiver and adjusting the delay times of the transmission data in the transmitter according to the detection result. The channel mismatch detection in the receiver is performed by comparing the phases of the received signals with respect to the pre-determined data pattern transmitted from the transmitter. The proposed MIPI C-PHY receiver is designed using a 65 nm complementary metal-oxide-semiconductor (CMOS) process with 1.2 V supply voltage. The area and power consumption of each transceiver lane are 0.136 ㎟ and 17.4 mW/GSymbol/s, respectively. The proposed channel mismatch correction reduces the time jitter of 88.6 ps caused by the channel mismatch to 34.9 ps.

Coexistence Analysis in Korean RFID/USN Frequency Bands Considering Both PHY and MAC Layers (국내 RFID/USN 대역에서 PHY/MAC 계층을 모두 고려한 주파수 공동사용 분석 방법)

  • Yoon, Hyungoo;Jang, Byung-Jun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.1
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    • pp.73-81
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    • 2013
  • In this paper, we have proposed the interference analysis method which uses both an interference probability model at the PHY layer of RFID system and the DTMC model at the MAC layer of USN system. Using the proposed method, we have performed sharing analysis between passive RFID and USN systems at the Korean RFID/USN frequency bands. If 1% performance degradation of USN system is allowed, RFID and USN systems can share the frequency bands where channel number is greater or equal to 20 on condition that radius of protection area is greater than 300 m.