• 제목/요약/키워드: Low-dropout(LDO) Regulator

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Design of the LDO Regulator with 2-stage wide-band OTA for High Speed PMIC (고속 PMIC용 2단 광대역 OTA방식의 LDO 레귤레이터 설계)

  • Kwon, Bo-Min;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.11 no.4
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    • pp.1222-1228
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    • 2010
  • This paper presents a design of the CMOS LDO regulator with a fast transient response for a high speed PMIC(power management integrated circuit). Proposed LDO regulator circuit consists of a reference voltage circuit, an error amplifier and a power transistor. 2-stage wide-band OTA buffer between error amplifier and power transistor is added for a good output stability. Although conventional source follower buffer structure is simple, it has a narrow output swing and a low S/N ratio. In this paper, we use a 2-stage wide-band OTA instead of source follower structure for a buffer. From HSPICE simulation results using a $0.5{\mu}m$ CMOS standard technology, simulation results were 16 mV/V line regulation and 0.007 %/mA load regulation.

The Study on Improvement of Traffic Rho Performance in RF Transmitter of CDMA Handset (CDMA 단말기 RF 송신단의 Traffic Rho 성능 개선에 관한 연구)

  • 박희봉;황승훈;황금찬
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.4B
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    • pp.624-628
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    • 2000
  • In this paper, the phenomenon to show in CDMA handset in case of which CDMA handset do not meet Traffic Rho value of IS-98B specifications, which have minimum requirements of CDMA handset about electrical performance is analyzed. This paper proposed method to improve Traffic Rho through improving the matching circuit of TX IF SAW FILTER and deleting noise of LDO(Low Dropout Regulator) to generate 3.OV_TX in TX block. HP8924C(CDMA Mobile Station Tester Set) and HP8595E(Spectrum Analyzer) measures the improved CDMA waveform.

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Implementation of Single-Phase Energy Measurement IC (단상 에너지 측정용 IC 구현)

  • Lee, Youn-Sung;Seo, Hae-Moon;Kim, Dong Ku
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.12
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    • pp.2503-2510
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    • 2015
  • This paper presents a single-phase energy measurement IC to measure electric power quantities. The entire IC includes two programmable gain amplifiers (PGAs), two ${\sum}{\Delta}$ modulators, a reference circuit, a low-dropout (LDO) regulator, a temperature sensor, a filter unit, a computation engine, a calibration control unit, registers, and an external interface block. The proposed energy measurement IC is fabricated with $0.18-{\mu}m$ CMOS technology and housed in a 32-pin quad-flat no-leads (QFN) package. It operates at a clock speed of 4,096 kHz and consumes 10 mW in 3.3 V supply.

A Design of High PSRR LDO over Wide Frequency Range without External Capacitor (외부 커패시터 없이 넓은 주파수 범위에서 높은 PSRR 갖는 LDO 설계)

  • Kim, Jin-Woo;Lim, Shin-Il
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.12
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    • pp.63-70
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    • 2013
  • This paper describes a high PSRR low-dropout(LDO) linear regulator for wide frequency range without output-capacitor. Owing to both of the cascode compensation technique and the current buffer compensation technique in nested Miller compensation loop, the proposed LDO not only maintaines high stability but also achieves high PSRR over wide frequency range with reasonable on-chip capacitances. Since the external capacitor is removed by the proposed compensation techniques, the cost for pad is eliminated. The designed LDO works under the input voltage range from 2.5V to 4.5V and provides up to 10mA load current with the output voltage of 1.8V. The LDO was implemented with 0.18um CMOS technology and the area is 300um X 120 um. The measured power supply rejection ratio(PSRR) is -76dB and -43dB at DC and 1MHz, respectively. The operating current is 25uA.

Output Noise Reduction Technique Based on Frequency Hopping in a DC-DC Converter for BLE Applications

  • Park, Ju-Hyun;Kim, Sung Jin;Lee, Joo Young;Park, Sang Hyeon;Lee, Ju Ri;Kim, Sang Yun;Kim, Hong Jin;Lee, Kang-Yoon
    • IEIE Transactions on Smart Processing and Computing
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    • v.4 no.5
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    • pp.371-378
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    • 2015
  • In this paper, a different type of pulse width modulation (PWM) control scheme for a buck converter is introduced. The proposed buck converter uses PWM with frequency hopping and a low quiescent.current low dropout (LDO) voltage regulator with a power supply rejection ratio enhancer to reduce high spurs, harmonics and output voltage ripples. The low quiescent.current LDO voltage regulator is not described in this paper. A three-bit binary-to-thermometer decoder scheme and voltage ripple controller (VRC) is implemented to achieve low voltage ripple less than 3mV to increase the efficiency of the buck converter. An internal clock that is synchronized to the internal switching frequency is used to set the hopping rate. A center frequency of 2.5MHz was chosen because of the bluetooth low energy (BLE) application. This proposed DC-DC buck converter is available for low-current noise-sensitive loads such as BLE and radio frequency loads in portable communications devices. Thus, a high-efficiency and low-voltage ripple is required. This results in a less than 2% drop in the regulator's efficiency, and a less than 3mV voltage ripple, with -26 dBm peak spur reduction operating in the buck converter.

FVF-Based Low-Dropout Voltage Regulator with Fast Charging/Discharging Paths for Fast Line and Load Regulation

  • Hinojo, Jose Maria;Lujan-Martinez, Clara;Torralba, Antonio;Ramirez-Angulo, Jaime
    • ETRI Journal
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    • v.39 no.3
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    • pp.373-382
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    • 2017
  • A new internally compensated low drop-out voltage regulator based on the cascoded flipped voltage follower is presented in this paper. Adaptive biasing current and fast charging/discharging paths have been added to rapidly charge and discharge the parasitic capacitance of the pass transistor gate, thus improving the transient response. The proposed regulator was designed with standard 65-nm CMOS technology. Measurements show load and line regulations of $433.80{\mu}V/mA$ and 5.61 mV/V, respectively. Furthermore, the output voltage spikes are kept under 76 mV for 0.1 mA to 100 mA load variations and 0.9 V to 1.2 V line variations with rise and fall times of $1{\mu}s$. The total current consumption is $17.88{\mu}V/mA$ (for a 0.9 V supply voltage).

Fault Diagnosis of Transformer Based on Self-powered RFID Sensor Tag and Improved HHT

  • Wang, Tao;He, Yigang;Li, Bing;Shi, Tiancheng
    • Journal of Electrical Engineering and Technology
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    • v.13 no.5
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    • pp.2134-2143
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    • 2018
  • This work introduces a fault diagnosis method for transformer based on self-powered radio frequency identification (RFID) sensor tag and improved Hilbert-Huang transform (HHT). Consisted by RFID tag chip, power management circuit, MCU and accelerometer, the developed RFID sensor tag is used to acquire and wirelessly transmit the vibration signal. A customized power management including solar panel, low dropout (LDO) voltage regulator, supercapacitor and corresponding charging circuit is presented to guarantee constant DC power for the sensor tag. An improved band restricted empirical mode decomposition (BREMD) which is optimized by quantum-behaved particle swarm optimization (QPSO) algorithm is proposed to deal with the raw vibration signal. Compared with traditional methods, this improved BREMD method shows great superiority in reducing mode aliasing. Then, a promising fault diagnosis approach on the basis of Hilbert marginal spectrum variations is brought up. The measured results show that the presented power management circuit can generate 2.5V DC voltage for the rest of the sensor tag. The developed sensor tag can achieve a reliable communication distance of 17.8m in the test environment. Furthermore, the measurement results indicate the promising performance of fault diagnosis for transformer.