• Title/Summary/Keyword: Low-cost Hardware

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Low-Cost Position Sensorless Switched Relutance Motor Drive Using a Single-Controllable Switch Converter

  • Yang, Hyong-Yeol;Kim, Jae-Hyuck;Krishnan, R.
    • Journal of Power Electronics
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    • v.12 no.1
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    • pp.75-82
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    • 2012
  • Elimination of rotor position sensors mechanically coupled with the rotor shaft is attractive to variable speed drives primarily due to increased system reliability and cost reduction. In this regard, search for a simple and robust position sensorless control has been intensified in past few years specifically for low-cost, high-volume applications such as home appliances. This paper describes a new parameter insensitive position sensorless control for switched reluctance motor (SRM) drives satisfying such a need in this market segment. Two consecutive switch-on times of the controllable switch in hysteresis current control are compared to estimate the rotor position and speed. The proposed sensorless control algorithm is very simple to implement since it does not depend on extensive computation or any additional hardware. In addition, the proposed method is robust in that its dynamic performance is least affected by system parameter variations. The proposed approach is demonstrated on a single-controllable-switch-converter-driven SRM with two-phases that lends itself to a system with low cost and compact packaging which comes close to the intended applications. Analysis and simulation results followed by experimental verification are presented to demonstrate the feasibility of the proposed sensorless control method.

Development of a Hardware-In-Loop (HIL) Simulator for Spacecraft Attitude Control Using Momentum Wheels

  • Kim, Do-Hee;Park, Sang-Young;Kim, Jong-Woo;Choi, Kyu-Hong
    • Journal of Astronomy and Space Sciences
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    • v.25 no.4
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    • pp.347-360
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    • 2008
  • In this paper, a Hardware-In-the-Loop simulator to simulate attitude control of space craft using momentum wheels is developed. The simulator consists of a spherical air bearing system allowing rotation and tilt in all three axes, three momentum wheels for actuation, and an AHRS (Attitude Heading Reference System). The simulator processes various types of data in PC104 and wirelessly communicates with a host PC using TCP/IP protocol. A simple low-cost momentum wheel assembly set and its drive electronics are also developed. Several experiments are performed to test the performance of the momentum wheels. For the control performance test of the simulator, a PID controller is implemented. The results of experimental demonstrations confirm the feasibility and validity of the Hardware-In-the-Loop simulator developed in the current study.

Energy Efficient and Low-Cost Server Architecture for Hadoop Storage Appliance

  • Choi, Do Young;Oh, Jung Hwan;Kim, Ji Kwang;Lee, Seung Eun
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.14 no.12
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    • pp.4648-4663
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    • 2020
  • This paper proposes the Lempel-Ziv 4(LZ4) compression accelerator optimized for scale-out servers in data centers. In order to reduce CPU loads caused by compression, we propose an accelerator solution and implement the accelerator on an Field Programmable Gate Array(FPGA) as heterogeneous computing. The LZ4 compression hardware accelerator is a fully pipelined architecture and applies 16 dictionaries to enhance the parallelism for high throughput compressor. Our hardware accelerator is based on the 20-stage pipeline and dictionary architecture, highly customized to LZ4 compression algorithm and parallel hardware implementation. Proposing dictionary architecture allows achieving high throughput by comparing input sequences in multiple dictionaries simultaneously compared to a single dictionary. The experimental results provide the high throughput with intensively optimized in the FPGA. Additionally, we compare our implementation to CPU implementation results of LZ4 to provide insights on FPGA-based data centers. The proposed accelerator achieves the compression throughput of 639MB/s with fine parallelism to be deployed into scale-out servers. This approach enables the low power Intel Atom processor to realize the Hadoop storage along with the compression accelerator.

A VLSI architecture for fast motion estimation algorithm (고속 움직임 추정 알고리즘에 적합한 VLSI 구조 연구)

  • 이재헌;라종범
    • Proceedings of the IEEK Conference
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    • 1998.06a
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    • pp.717-720
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    • 1998
  • In this paper, we propose a VLSI architecture for implementing a crecently proposed fast block matching algorithm, which is called the HSBMA3S. The proposed architecture consists of a systolic array based basic unit and two shift register arrays. And it covers a search range of -32 ~+31. By using a basic unit repeatedly, we can redcue the number of gates. To implement the basic unit, we can select one among various conventional systolic arrays by trading-off between speed and hardware cost. In this paper, the architecture for the basic unit is selected so that the hardware cost can be minimized. The proposed architecture is fast enough for low bit-rate applications (frame size of 352x288, 30 frames/sec) and can be implemented by less than 20,000 gates. Moreover, by simply modifying the basic unit, the architecture can be used for the higher bit-rate application of the frame size of 720*480 and 30 frames/sec.

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Autonomous hardware development for impedance-based structural health monitoring

  • Grisso, Benjamin L.;Inman, Daniel J.
    • Smart Structures and Systems
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    • v.4 no.3
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    • pp.305-318
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    • 2008
  • The development of a digital signal processor based prototype is described in relation to continuing efforts for realizing a fully self-contained active sensor system utilizing impedance-based structural health monitoring. The impedance method utilizes a piezoelectric material bonded to the structure under observation to act as both an actuator and sensor. By monitoring the electrical impedance of the piezoelectric material, insights into the health of the structured can be inferred. The active sensing system detailed in this paper interrogates a structure utilizing a self-sensing actuator and a low cost impedance method. Here, all the data processing, storage, and analysis is performed at the sensor location. A wireless transmitter is used to communicate the current status of the structure. With this new low cost, field deployable impedance analyzer, reliance on traditional expensive, bulky, and power consuming impedance analyzers is no longer necessary. A complete power analysis of the prototype is performed to determine the validity of power harvesting being utilized for self-containment of the hardware. Experimental validation of the prototype on a representative structure is also performed and compared to traditional methods of damage detection.

A development of Diagnosis Monitoring System for UPS DC Link Capacitors using Zigbee Wireless Communication (Zigbee 무선통신을 이용한 UPS DC링크 커패시터의 고장 모니터링 시스템 개발)

  • Kim, Dong-Jun;Shon, Jin-Geun;Jeon, Hee-Jong
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.61 no.1
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    • pp.41-46
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    • 2012
  • Electrolytic power capacitors have been widely used in power conversion system such as inverter or UPS because of characteristics of large capacitance, high-voltage and low-cost. The electrolytic capacitor, which is most of the time affected by the aging effect, plays a very important role for the power-electronics system quality and reliability. Therefore it is important to diagnosis monitoring the condition of an electrolytic capacitor in real-time to predict the failure. In this paper, the on-line remote diagnosis monitoring system for UPS DC link electrolytic capacitors using low-cost single-chip zigbee communication modules is developed. To estimate the health status of the capacitor, the equivalent series resistor(ESR) of the component has to be determined. The capacitor ESR is estimated by using RMS computation using BPF modeling of DC link ripple voltage/current. Zigbee-based hardware experimental results show that the proposed remote capacitor diagnosis monitoring system can be applied to UPS successfully.

A Study on The Marketing Strategy of IoT (Internet of Things)-based Smart Home Service Companies Focusing on The Case of Xiaomi

  • Liang, Jinle;Kang, Min Jung
    • International Journal of Internet, Broadcasting and Communication
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    • v.13 no.1
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    • pp.20-25
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    • 2021
  • In the background of the rapid development of the IoT, smart home work is becoming more and more important to each science and technology company. Smart home provides a safe, comfortable, high-quality, high-performance smart home living space compared to general homes, and at the same time It is responding to the low-carbon, eco-friendly global trend. Growth drivers driving the smart home market are increasing the number of Internet users, increasing disposable income in developing countries, increasing the importance of remote home monitoring, and increasing the need for energy saving and low carbon. In 2013-2014, Xiaomi launched a series of smart routers and smart home hardware devices. In 2015, it announced the latest product of the Xiaomi Ecological Chain, the "Smart Home Package," and in 2016 launched the MIJIA brand to invest in various smart product companies. In 2017, Xiaomi announced a plan to build an open smart hardware MIOT platform. We investigated the management strategy of Xiaomi home smart service based on IOT. The management strategy was divided into cost lead strategy, differentiation strategy of Xiaomi home service, and AIOT strategy of Xiaomi smart home.

Design and Implementation of Low-Cost Articulate Manipulator for Academic Applications

  • Muhammad Asim Ali;Farhan Ali Shah
    • International Journal of Computer Science & Network Security
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    • v.24 no.1
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    • pp.17-22
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    • 2024
  • The objective of this work is to design a low cost yet fully functional 4-DOF articulate manipulator for educational applications. The design is based on general purpose, programmable smart servo motors namely the Dynamixel Ax-12. The mechanism for motion was developed by formulating the equations of kinematics and subsequent solutions for joint space variables. The trajectory of end-effector in joint variable space was determined by interpolation of a 3rd order polynomial. The solutions were verified through computer simulations and ultimately implemented on the hardware. Owing to the feedback from the built-in sensors, it is possible to correct the positioning error due to loading effects. The proposed solution offers an efficient and cost-effective platform to study the trajectory planning as well as dynamics of the manipulator.

Development of A High Performance Motion Controller

  • Cho, Jung-Uk;Jeon, Jae-Wook
    • 제어로봇시스템학회:학술대회논문집
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    • 2002.10a
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    • pp.43.3-43
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    • 2002
  • $\textbullet$ A high performance motion controller can be applied to a wider range areas. $\textbullet$ Users can easily add, delete, or modify the library functions in this motion controller $\textbullet$ users can easily create, delete, or change GUI menu in this motion controller $\textbullet$ The motion related libraries base on IEEE/NEMI low-cost open architecture controller specification. $\textbullet$ Many low-level libraries and GUI that can make users easily interface with hardware are developed. $\textbullet$ Various velocity profiles are generated for performing given tasks efficiently. $\textbullet$ The hardware of a high performance motion controller is developed with using DSP and PLD.

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Deterministic Bipolar Compressed Sensing Matrices from Binary Sequence Family

  • Lu, Cunbo;Chen, Wengu;Xu, Haibo
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.14 no.6
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    • pp.2497-2517
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    • 2020
  • For compressed sensing (CS) applications, it is significant to construct deterministic measurement matrices with good practical features, including good sensing performance, low memory cost, low computational complexity and easy hardware implementation. In this paper, a deterministic construction method of bipolar measurement matrices is presented based on binary sequence family (BSF). This method is of interest to be applied for sparse signal restore and image block CS. Coherence is an important tool to describe and compare the performance of various sensing matrices. Lower coherence implies higher reconstruction accuracy. The coherence of proposed measurement matrices is analyzed and derived to be smaller than the corresponding Gaussian and Bernoulli random matrices. Simulation experiments show that the proposed matrices outperform the corresponding Gaussian, Bernoulli, binary and chaotic bipolar matrices in reconstruction accuracy. Meanwhile, the proposed matrices can reduce the reconstruction time compared with their Gaussian counterpart. Moreover, the proposed matrices are very efficient for sensing performance, memory, complexity and hardware realization, which is beneficial to practical CS.