• Journal of Korea Multimedia Society
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• v.19 no.7
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• pp.1179-1187
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• 2016

Through the rapid development of latest hardware technology, high performance as well as miniaturized size is the essentials of embedded system to meet various requirements from the society. It raises possibilities of genuine realization of IoT environment whose size and battery must be considered. However, the limitation of battery persistency and capacity restricts the long battery life time for guaranteeing real-time system. To maximize battery life time, low power technology which lowers the power consumption should be highly required. Previous researches mostly highlighted improving one single type of memory to increase ones efficiency. In this paper, reversely, considering multiple memories to optimize whole memory system is the following step for the efficient low power embedded system. Regarding to that fact, this paper suggests the study of volatile memory, whose capacity is relatively smaller but much low-powered, and non-volatile memory, which do not consume any standby power to keep data, to maximize the efficiency of the system. By executing function in specific memories, non-volatile and volatile memory, the quantitative analysis of power consumption is progressed. In spite of the opportunity cost of all of theses extra works to locate function in volatile memory, higher efficiencies of both power and energy are clearly identified compared to operating single non-volatile memory.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.10A
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• pp.943-951
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• 2006

Multi-input-multi-output (MIMO) systems are considered to improve the capacity and reliability of next generation mobile communication. However, the multiple RF chains associated with multiple antennas are costly in terms of size, power and hardware. Antenna selection is a low-cost low-complexity alternative to capture many of the advantages of MIMO systems. We proposed new joint Tx/Rx antenna selection algorithm with low complexity. The proposed algorithm is a method selects $L_R{\times}L_T$ channel matrix out of $L_R{\times}L_T$ entire channel gain matrix where $L_R{\times}L_T$ matrix selects alternate Tx antenna with Rx antenna which have the largest channel gain to maximize Frobenius norm. The feature of this algorithm is very low complexity compare with Exhaustive search which have optimum capacity. In case of $4{\times}4$ antennas selection out of $8{\times}8$ antennas, the capacity decreases $0.5{\sim}2dB$ but the complexity also decreases about 1/10,000 than optimum exhaustive search.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.5
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• pp.103-111
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• 2007

In this paper, we propose a VLSI architecture of hardware optimized high quality image signal processor for a Single-chip CMOS Image Sensor(CIS). The Single-chip CIS is usually used for mobile applications, so it has to be implemented as small as possible while maintaining the image quality. Several image processing algorithms are used in ISP to improve captured image quality. Among the several image processing blocks, demosaicing and image filter are the core blocks in ISP. These blocks need line memories, but the number of line memories is limited in a low cost Single-chip CIS. In our design, high quality edge-adaptive and cross channel correlation considered demosaicing algorithm is adopted. To minimize the number of required line memories for image filter, we share the line memories using the characteristics of demosaicing algorithm which consider the cross correlation. Based on the proposed method, we can achieve both high quality and low hardware complexity with a small number of line memories. The proposed method was implemented and verified successfully using verilog HDL and FPGA. It was synthesized to gate-level circuits using 0.25um CMOS standard cell library. The total logic gate count is 37K, and seven and half line memories are used.

• The Journal of the Korea Contents Association
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• v.13 no.8
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• pp.458-465
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• 2013

The purpose of this research is possible to reduce cost of management and maintenance to realization of smartphone and using data server network technology instead of GPS. Former wireless bus information system was focused on supply side management structure and national spread thus it needs to establish GPS terminal, Windows CE, Window XP embedded and LCD panels which provide only one way communication of information of public traffic information. Therefore, former system management and maintenance cost are very expansive. This research is not use GPS terminal and other hardware equipment but design and realization using smartphone and data network server. This system also provides low cost of management and maintenance. It is not only service downtown area but also out of town and small and medium-sized cities. This system functionally gets a satisfying result user convenience and satisfaction using function of set-up route map, real-time display, and running statically analysis.

• Journal of Korea Multimedia Society
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• v.14 no.11
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• pp.1450-1457
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• 2011

Currently most of leak detection monitoring systems use digital maps with paying royalties, and this increases the cost of system construction and financial burdens on local self-governing bodies that manage such systems. Moreover, they have inefficiencies in repair and maintenance, functional expansion, and compatibility with other systems. Thus, this study developed a waterworks pipe network monitoring system that pursues low cost and high efficiency using general-purpose maps on the Internet such as google maps. As this system uses highly compatible free maps, it costs less in construction and its hardware requirements are lower than existing systems, and consequently, overall monitoring performance is enhanced and the cost of construction goes down sharply. This study also proposed a method for pipeline DB construction, which can be started together with the construction of the monitoring system, in order to improve the field applicability of the system.

• Journal of Korea Multimedia Society
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• v.3 no.4
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• pp.347-355
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• 2000

This paper presents an adaptive AEC(acoustic echo canceller) based on the wavelet transform using M-channel subband QMF filter banks. The proposed algorithm improves the performance of AEC with a realtime process by a low complexity of wavelet transform filter banks, a subband processing and a orthogonality of wavelet subband filter. Adaptive filter coefficients of each subband are updated using LMS algorithm with a low complexity and a easy realization for a realtime processing and a reduction of hardware cost. For a input signal, a white Gaussian noise and a real speech signal with a environment noises are used for a performance estimation of the proposed algorithm. As a result of computer simulation, the proposed AEC has a low asymptotic error, a low computation complexity and a robust performance.

• Journal of KIISE:Software and Applications
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• v.36 no.8
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• pp.616-622
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• 2009

Thanks to Dynamic Capacitance Control (DCC) technique, response time of an LCD display has greatly improved. However, DCC requires hi-speed memory for the real-time writing/reading of an image of a previous frame, which results in increases in hardware overhead and cost. In this paper, we propose Modified Exponential Golomb (MEG) coding, a low-complex high-speed image compression method, which can remarkably reduce memory requirement for DCC. We also propose a pixel-wise DCC switching technique to prevent a compression error from affecting the quality of a final image on LCD. In our experiment, the degradation in visual quality was not noticeable when we cut the DCC memory size of 1080i HD data by 1/3.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.8
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• pp.27-34
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• 2012

In this paper, the implementation of high throughput two-dimensional (2-D) $8{\times}8$ forward and inverse integer DCT transform for H.264 is presented. The forward and inverse transforms are represented using simple shift and addition operations. Matrix decomposition and matrix operation such as the Kronecker product and direct sum are used to reduce the computation complexity. The proposed design uses integer computations and does not use transpose memory and hence, the resource consumption is also reduced. The maximum operating frequency of the proposed pipelined architecture is 1.184 GHz, which achieves 25.27 Gpixels/sec throughput rate with the hardware cost of 44864 gates. High throughput and low hardware makes the proposed design useful for real time H.264/AVC high definition processing.

• The KIPS Transactions:PartA
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• v.11A no.7 s.91
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• pp.489-498
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• 2004

VLIW processor is considered to be an appropriate processor for the embedded system, provided with high performance and low power con-sumption due to its simple hardware structure. Unfortunately, the VLIW processor often suffers from high memory access latency due to the variable length of I-packets, which consist of independent instructions to be issued in parallel. It is because of the variable I-packet length that some I-packets must be placed over two cache blocks, which are called straddle I-packets, so that two cache accesses are required to fetch such I-packets. In this paper, an expansion buffer cache is proposed to improve not only the instruction fetch bandwidth, but also the power consumption of the I-cache with moderate hardware cost. The expansion buffer cache has a small expansion buffer containing a fraction of a straddle packet along with the main cache to reduce the additional cache accesses due to the straddle I-packets. With a great reduction in the cache accesses due to the straddle packets, the expansion buffer cache can achieve $5{\~}9{\%}$improvement over the conventional I-caches in the $Delay{\cdot}Power{\cdot}Area$ metric.

• Korea Journal of Hospital Management
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• v.1 no.1
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• pp.188-202
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• 1996

Telehealth is widely tested in the U.S.A and other developed countries. This system is expected to solve rural health problems reducing professional isolation. Some demonstration projects showed that the system can provide quality care in reasonable prices to rural residents. However, few study has been done on whether telehealth system can attract physicians by reducing professional isolation. The system is not available to most of the rural hospitals because the price for the equipment and telephone charges are not low enough. It is promising that the system cost and telephone charges are decreasing gradually. As time passes, rural hospitals will be more viable for the system. Satisfaction of the physicians and patients is a key factor for the implementation of the system. The physicians need to understand more about telecommunication and computer systems. After physicians are well-versed about the system, we can expect wide use of telehealth in rural areas. Effort for the confidentiality and standardization should be devoted to assure patient's privacy and compatibility of patient records and exam results. In Korea, two projects are being operated in Uljin and Kurye. A study evaluated the economic efficiency of the projects suggesting that increase of the number of patients up to three times of current number or decrease in hardware costs and telecommunication charges into two thirds of the current costs. The hardware and telecommunication charges are decreasing. Another area telehealth system can be applied is psychiatric accommodation facilities. Establishment of telehealth in the psychiatric facilities will increase the access of psychiatric care for patients and is expected to be economically efficient.