• 조명전기설비학회논문지
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• 제24권12호
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• pp.78-83
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• 2010

The domestic 30AFs that are currently being produced show many problems due to different instantaneous trip characteristics in case of short-circuit. The troubles may cause explosion by excessive short-circuit capacities and arc emission, which results in a wide range of blackout. The function and safety of the low voltage circuit breakers installed before the end load are very important. This paper presents an idea on the safety improvement of the low voltage circuit-breakers through the analysis of instantaneous trip characteristics of domestic 30AF circuit-breakers.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2011년도 전력전자학술대회
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• pp.242-244
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• 2011

A wind generator system model includes wind model, rotor dynamics, synchronous generator, power converter, distribution line and infinite bus. This paper investigates the low-Voltage Ride-Through capability of PMSG wind turbine in a variable speed. The drive train of a wind turbine on 2-mass modeling can observe the shaft torsional vibration when the low-voltage occur. To reduce the torsional vibration when the low-voltage occur, this paper designs suppression control algorithm of the torsional vibration and implements simulation. A Matlab/Simulink is used to investigate the response during the transient state.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2009년도 제40회 하계학술대회
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• pp.696_697
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• 2009

저압배전반(Low-voltage switchgear and controlgear assemblies)에 관한 대표적인 국제규격으로는 IEC 60439 시리즈가 있어, 저압배전반의 형식시험(Type test)시 이 규격을 적용하여 시험하고 있으며, 한편으로 오랫동안 IEC 60439 시리즈의 규격 개정작업이 진행되어 첫 번째로 IEC 60439 시리즈 중 Par1(IEC 60439-1)이 2009년 1월 IEC 61439-1 (Low-voltage switchgear and controlgear assemblies. Part 1 : General rules) 및 IEC 61439-2 (Low-voltage switchgear and controlgear assemblies - Part 2 : Power switchgear and controlgear assemblies)로 대체 되었다. 본 고찰에서는 새로 제정된 61439-1 및 61439-2의 형식시험 항목 및 방법을 개략적으로 소개하여, 신 규격에 의한 배전반 형식시험에 도움을 주고자 한다.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2005년도 ICCAS
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• pp.1877-1880
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• 2005

This paper proposed the new current feed-back amplifier for low supply voltage application. The input stage was designed to be a class-AB circuit and achieve the low supply-voltage operation down to $2V_{TH}+2V_{DS(SAT)}$. With the self-adjust bias current, the high performance can be adopted with high stability. The circuit was successfully proven by the simulation with MOSIS 0.5 ${\mu}$m MOS technology.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.979-982
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• 2003

Due to the differential transmission technique and low voltage swing, LVDS has been widely used for high speed transmission with low power consumption. This paper presents the design and implementation of interface circuits for 1.5Gb/s operation in 0.35um CMOS technology. The interface circuit ate fully compatible with the low-voltage differential signaling(LVDS) standard. The LVDS proposed in this paper utilizes a sense amplifiers instead of the conventional differential pre-amplifier, which provides a 1.5Gb/s transmission speed with further reduced driver output voltage. Furthermore, the reduced driver output voltage results in reducing the power consumption.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2002년도 춘계종합학술대회
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• pp.283-287
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• 2002

To remedy both the degradation and saturation of the output voltages in the modified Dickson pump. a new multi-stage charge pump circuit is presented in this paper. Here using PMOS charge-transfer switches instead of NMOS ones eliminates the necessity of diode-configured output stage in the modified-Dickson pump, achieving the improved voltage pumping gain and its output voltages proportional to the stage numbers. Measurement indicates that VOUT/3VDD of this new pump circuit with two stages reaches to a value as high as 0.94 even with low VDD=1.0 V, strongly addressing that this scheme is very favorable at low-voltage memory applications.

• Journal of Power Electronics
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• 제16권1호
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• pp.340-350
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• 2016

A cascaded hybrid multilevel inverter including a reconfiguration technique for low voltage dc distribution applications is proposed in this paper. A PWM generation fault detection and reconfiguration paradigm after an inverter cell fault are developed by using only a single-chip controller. The proposed PWM technique is also modified to reduce switching losses. In addition, the proposed topology can reduce the number of required power switches compared to the conventional cascaded multilevel inverter. The proposed technique is validated by using a 3-kVA prototype. The switching losses of the proposed multilevel inverter are also investigated. The experimental results show that the proposed hybrid inverter can improve system efficiency, reliability and cost effectiveness. The efficiency of proposed system is 97.45% under the tested conditions. The proposed hybrid inverter topology is a promising method for low voltage dc distribution and can be applied for the multiple loads which are required in a data center or telecommunication building.

• 전기학회논문지
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• 제63권10호
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• pp.1371-1376
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• 2014

In this paper, 4-phase switched reluctance motor(SRM) with 8-stator and 6-rotor pole structure is proposed for a high speed fan with a low voltage. The air blower has unidirectional rotation characteristics and requires a low torque ripple and noise as well as high efficiency. To achieve the requirements, voltage and current according to loading condition of limited specification is considered. Design process is to select the bore diameter, pole arc, york of stator and rotor to get a high torque and efficiency. To verify the validity of the proposed structure, finite element method(FEM) is employed to get the performances. And the converter for the proposed SRM is employed a 1.5q power converter for cost effectiveness. Prototype SRM is manufactured and tested, and the test results show this design is within the specification and good for the air blower applications.

• 전기학회논문지
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• 제66권12호
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• pp.1721-1724
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• 2017

This paper presents a numerical optimization technique to reduce input current and torque ripple of the low voltage BLDC motor using core, coil and switching angle optimization. The optimization technique is employed using the generalized response surface method(RSM) and sampling minimization technique with FEM. A 50W 24V BLDC motor is used to verify the proposed algorithm. As optimizing results, the input current is reduced from 2.46 to 2.11[A], and the input power is reduced from 59 [W] to 51 [W] at the speed of 1000 [rpm]. Also, applied the same optimization algorithm, the torque ripple is reduced about 7.4 %. It is confirmed that the proposed technique is a reasonably useful tool to reduce the consuming current and torque ripple of the low voltage BLDC motor for a compact and efficient design.

• 전기학회논문지
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• 제66권4호
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• pp.659-665
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• 2017

Power semiconductor devices required the low on-resistance and high breakdown voltage. Wide band-gap materials opened a new technology of the power devices which promised a thin drift layer at an identical breakdown voltage. The diamond had the wide band-gap of 5.5 eV which induced the low power loss, high breakdown capability, low intrinsic carrier generation, and high operation temperature. We investigated the p-type pseudo-vertical diamond Schottky barrier diodes using a numerical simulation. The impact ionization rate was material to calculating the breakdown voltage. We revised the impact ionization rate of the diamond for adjusting the parallel-plane breakdown field at 10 MV/cm. Effects of the field plate on the breakdown voltage was also analyzed. A conventional diamond Schottky barrier diode without field plate exhibited the high forward current of 0.52 A/mm and low on-resistance of $1.71{\Omega}-mm$ at the forward voltage of 2 V. The simulated breakdown field of the conventional device was 13.3 MV/cm. The breakdown voltage of the conventional device and proposed devices with the $SiO_2$ passivation layer, anode field plate (AFP), and cathode field plate (CFP) was 680, 810, 810, and 1020 V, respectively. The AFP cannot alleviate the concentration of the electric field at the cathode edge. The CFP increased the breakdown voltage with evidences of the electric field and potential. However, we should consider the dielectric breakdown because the ideal breakdown field of the diamond is higher than that of the $SiO_2$, which is widely used as the passivation layer. The real breakdown voltage of the device with CFP decreased from 1020 to 565 V due to the dielectric breakdown.