• Title/Summary/Keyword: Low switching energy

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New Active Snubber Boost PFC Converter for Efficiency Improvement in Home Appliances Applications

  • Jeong, In Wha;Park, Mingyu;Um, Kee-Ju;Heo, Chang Jae;Lee, JunHo;Kim, Kwangsoo;Suh, Bum-Seok;Kim, Yong-Wook;Kim, Rae-Young
    • Proceedings of the KIPE Conference
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    • 2012.07a
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    • pp.289-290
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    • 2012
  • This paper proposes a new active snubber boost PFC converter to provide a zero-voltage-switching (ZVS) turn-on condition and reduce electromagnetic interference (EMI) noise in home appliances and renewable energy applications, including solar or fuel cell electric systems. The proposed active snubber circuit enables a main boost switch of the boost-type PFC or grid converter to turn on under a ZVS condition and reduce the switching losses of the main boost switch. Moreover, for the purpose of a specialized intelligent power module (IPM) fabrication, the proposed boost circuit is designed to satisfy some design aspects such as space saving, low cost, and easy fabrication. Simulation and experimental results of a 2kW IPM boost-type PFC converter are provided to verify the effectiveness of the proposed active snubber boost circuit.

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A Non-isolated High Step-up DC/DC Converter with Low EMI and Voltage Stress for Renewable Energy Applications

  • Baharlou, Solmaz;Yazdani, Mohammad Rouhollah
    • Journal of Electrical Engineering and Technology
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    • v.12 no.3
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    • pp.1187-1194
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    • 2017
  • In this paper, a high step-up DC-DC PWM converter with continuous input current and low voltage stress is presented for renewable energy application. The proposed converter is composed of a boost converter integrated with an auxiliary step-up circuit. The auxiliary circuit uses an additional coupled inductor and a balancing capacitor with voltage doubler and switching capacitor technique to achieve high step-up voltage gain with an appropriate switch duty cycle. The switched capacitors are charged in parallel and discharged in series by the coupled inductor, stacking on the output capacitor. In the proposed converter, the voltage stress on the main switch is clamped, so a low voltage switch with low ON resistance can be used to reduce the conduction loss which results in the efficiency improvement. A detailed discussion on the operating principle and steady-state analyses are presented in the paper. To justify the theoretical analysis, experimental results of a 200W 40/400V prototype is presented. In addition, the conducted electromagnetic emissions are measured which shows a good EMC performance.

Low-Power DCT Architecture by Minimizing Switching Activity (스위칭 엑티비티를 최소화한 저전력 DCT 아키텍쳐 구현)

  • Kim, San;Park, Jong-Su;Lee, Yong-Surk
    • Proceedings of the Korea Information Processing Society Conference
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    • 2005.05a
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    • pp.863-866
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    • 2005
  • Low-power design is one of the most important challenges encountered in maximizing battery life in portable devices as well as saving energy during system operation. In this paper we propose a low-power DCT (Discrete Cosine Transform) architecture using a modified Computation Sharing Multiplication (CSHM). The overall rate of power consume is reduced during DCT: the proposed architecture does not perform arithmetic operations on unnecessary bits during the Computation Sharing Multiplication calculations. Experimental results show that it is possible to reduce power dissipation up to about $7{\sim}8%$ without compromising the final DCT results. The proposed lowpower DCT architecture can be applied to consumer electronics as well as portable multimedia systems requiring high throughput and low-power.

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A study on the pulse forming of pulsed $CO_2$ laser using active multi-pulse superposition (능동적 다중 펄스 중첩법(AMPS)을 적용한 펄스형 $CO_2$ 레이저의 펄스 성형에 대한 연구)

  • Chung, Hyun-Ju;Park, Sung-Joon;Jung, Yong-Ho;Song, Gun-Ju;Kim, Hee-Je;Kim, Whi-Young
    • Proceedings of the KIEE Conference
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    • 2001.07c
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    • pp.1631-1633
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    • 2001
  • In manufacturing processes, various and suitable pulse shapes are required for the purpose of material processing and the pulseshape is regarded as a dominant factor due to the specific property of processing materials. Therefore, in this study, a variable pulse width, high duty cycle Pulse Forming Network(PFN) is constructed by time sequently. The power supply for this experiment consists of three switching circuits. The PFN elements operate at low voltage and drive the primary of HV leakage transformer. The secondary of the transformer has a full-wave rectifier, which passes the pulse energy to the load in a continuous sequence of properly phased and nested increments. We investigated laser pulse width as various delay time among three switching circuit. As a result, we tan obtain various laser pulse width from about 4ms to 10ms. The maximum laser pulse width obtained at this experiment was about 10ms at delay time of 4ms among each switching circuit.

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Statistical analysis for small power module (소형전원장치에 대한 통계적 분석)

  • Shin, Jae-Kyoung
    • Journal of the Korean Data and Information Science Society
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    • v.22 no.4
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    • pp.735-740
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    • 2011
  • In recent, electronic devices were able to develop and focus for ultra-compact size, intelligence, multifunction and broadband. Their SMPS is realized to ultra-compact size, light weight, high efficiency, high reliability, low noises. The power module which can be used to supply DC output from a commercial power supply (85 to 265 VAC). A switching power supply can be made easily by adding simply external circuit, such as microcontroller, a relay, etc. It would be apply to mostly electronic devices, and fit the global project "Saving energy". But we need to statistical analysis for a quality and performance about a load and an output voltage in product.

Modeling and Design of Zero-Voltage-Switching Controller for Wireless Power Transfer Systems Based on Closed-Loop Dominant Pole

  • Chen, Cheng;Zhou, Hong;Deng, Qijun;Hu, Wenshan;Yu, Yanjuan;Lu, Xiaoqing;Lai, Jingang
    • Journal of Power Electronics
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    • v.19 no.5
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    • pp.1235-1247
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    • 2019
  • Zero-Voltage-Switching (ZVS) operation for a Wireless Power Transfer (WPT) system can be achieved by designing a ZVS controller. However, the performance of the controller in some industrial applications needs to be designed tightly. This paper introduces a ZVS controller design method for WPT systems. The parameters of the controller are designed according to the desired performance based on the closed loop dominant pole placement method. To describe the dynamic characteristics of the system ZVS angle, a nonlinear dynamic model is deduced and linearized using the small signal linearization method. By analyzing the zero-pole distribution, a low-order equivalent model that facilitates the controller design is obtained. The parameters of the controller are designed by calculating the time constant of the closed-loop dominant poles. A prototype of a WPT system with the designed controller and a five-stage multistage series variable capacitor (MSVC) is built and tested to verify the performance of the controller. The recorded response curves and waveforms show that the designed controller can maintain the ZVS angle at the reference angle with satisfactory control performance.

A High-Efficiency Two-Switch Flyback Converter with Energy Recovery Snubbers (에너지 재생 스너버를 갖는 고효율 두 스위치 플라이백 컨버터)

  • Kim, Marn-Go;Jung, Young-Seok
    • Proceedings of the KIPE Conference
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    • 2010.07a
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    • pp.489-490
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    • 2010
  • A novel soft-switching two-switch flyback converter is proposed in this paper. This converter is composed of two active power switches, a flyback transformer, and two passive regenerative clamping circuits.The proposed converter has the advantages of a low cost circuit configuration, a simple control scheme, a high efficiency, and a wide operating range. The circuit topology and experimental results of the new flyback converter are presented.

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A 40fJ/c-s 1 V 10 bit SAR ADC with Dual Sampling Capacitive DAC Topology

  • Kim, Bin-Hee;Yan, Long;Yoo, Jerald;Yoo, Hoi-Jun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.1
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    • pp.23-32
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    • 2011
  • A 40 fJ/c-s, 1 V, 10-bit SAR ADC is presented for energy constrained wearable body sensor network application. The proposed 10-bit dual sampling capacitive DAC topology reduces switching energy by 62% compared with 10-bit conventional SAR ADC. Also, it is more robust to capacitor mismatch than the conventional architecture due to its cancelling effect of each capacitive DAC. The proposed SAR ADC is fabricated in 0.18 ${\mu}m$ 1P6M CMOS technology and occupies 1.17 $mm^2$ including pads. It dissipates only 1.1 ${\mu}W$ with 1 V supply voltage while operating at 100 kS/s.

Battery Energy Storage System with Novel High Efficiency Topology (배터리 에너지 저장 시스템을 위한 새로운 고효율 토폴로지)

  • Lee, Il-Ho;Kim, Kyu-Dong;Lee, Yong-Suk;Kim, Jun-Gu;Won, Chung-Yuen
    • Proceedings of the KIPE Conference
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    • 2012.07a
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    • pp.431-432
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    • 2012
  • The proposed dc-dc convertor for a battery energy storage system(BESS) can reduce the power rating and bidirectional power flow. This system consist soft-switching bidirectional dc-dc converter so it can reduce the energy loss when charging and discharging mode. Thus it can achieve high efficiency. Also, overall system utilizes the voltage compensation circuit. It is composed of small size and low cost due to reducing the power rating. In this paper, we proposed system about verified by simulation.

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Drive Circuit for Switched Reluctance Motor with Flyback Transformer (Flyback Transformer를 갖는 Switched Reluctance Motor의 구동회로)

  • Lim, J.Y.;Cho, K.Y.;Baik, I.C.;Shin, D.J.;Kim, J.C.
    • Proceedings of the KIEE Conference
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    • 1993.07b
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    • pp.833-836
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    • 1993
  • A flyback type power converter circuit for switched reluctance motor drives is presented. In this converter circuit, the energy extracted from an off going phase is stored in an additional capacitor. The energy stored is used to either be returned to the source frequently or energize the conducting phase during the conduction interval through the transformer. The additional switch to pass the energy stored in the capacitor to the source or the conducting phase is switched under a relatively low voltage condition. Its switching frequency is relatively high so that the size of the transformer can be reduced. The design guideline for the capacitor and the transformer is described. The effectiveness of the presented converter circuit is compared to other circuits through the analysis and experiment.

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