• 제목/요약/키워드: Low supply voltage

검색결과 892건 처리시간 0.025초

250 mV Supply Voltage Digital Low-Dropout Regulator Using Fast Current Tracking Scheme

  • Oh, Jae-Mun;Yang, Byung-Do;Kang, Hyeong-Ju;Kim, Yeong-Seuk;Choi, Ho-Yong;Jung, Woo-Sung
    • ETRI Journal
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    • 제37권5호
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    • pp.961-971
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    • 2015
  • This paper proposes a 250 mV supply voltage digital low-dropout (LDO) regulator. The proposed LDO regulator reduces the supply voltage to 250 mV by implementing with all digital circuits in a$0.11{\mu}m$ CMOS process. The fast current tracking scheme achieves the fast settling time of the output voltage by eliminating the ringing problem. The over-voltage and under-voltage detection circuits decrease the overshoot and undershoot voltages by changing the switch array current rapidly. The switch bias circuit reduces the size of the current switch array to 1/3, which applies a forward body bias voltage at low supply voltage. The fabricated LDO regulator worked at 0.25 V to 1.2 V supply voltage. It achieved 250 mV supply voltage and 220 mV output voltage with 99.5% current efficiency and 8 mV ripple voltage at $20{\mu}A$ to $200{\mu}A$ load current.

다중 공급 전압을 이용한 저 전력 스케쥴링 및 할당 알고리듬 (A Low power Scheduling and Allocation Algorithm for Multiple Supply Voltage)

  • 최지영;박남서;안도희
    • 한국컴퓨터정보학회논문지
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    • 제7권2호
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    • pp.79-86
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    • 2002
  • 본 논문은 다중 공급 전압을 이용한 저 전력 스케쥴링 및 할당 알고리듬을 제안한다. 다중 공급 전압스케쥴링에서는 전력소비를 줄이기 위해 다른 전압 레벨을 이용해 실험적으로 가능한 연산을 수행하여 제어 스텝을 결정한다. 그리고 다중 공급 전압 할당에서는 그래프 컬러링 기법을 이용해 레지스터 상의 스위칭 활동을 최소화한다. 상위 레벨 벤치마크 예제를 이용한 실험으로부터 우리는 다중 공급 전압을 이용한 제안한 알고리듬이 전력 소비를 줄이는데 효율적임을 보인다.

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저전압 감지회로에 관한 연구 (A Study on the Low Voltage Detection Circuit)

  • 김필중
    • 한국전기전자재료학회논문지
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    • 제29권11호
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    • pp.676-680
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    • 2016
  • This paper describes a low voltage detection circuit used in the semiconductor chips. The circuit was composed of a detection part of the CMOS structure as three stages and two inverters. The output of the low voltage detection circuit become to 'high' from 'low', when the power supply voltage falls below 80%. When the power supply voltage is 5 V, it was detected at 4 V point. The proposed low voltage detection circuit can be easily applied only by changing the resister and the capacitor without structural change in a wide range of power supply voltage.

A Low Voltage Bandgap Current Reference with Low Dependence on Process, Power Supply, and Temperature

  • Cheon, Jimin
    • 한국정보기술학회 영문논문지
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    • 제8권2호
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    • pp.59-67
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    • 2018
  • The minimum power supply voltage of a typical bandgap current reference (BGCR) is limited by operating temperature and input common mode range (ICMR) of a feedback amplifier. A new BGCR using a bandgap voltage generator (BGVG) is proposed to minimize the effect of temperature, supply voltage, and process variation. The BGVG is designed with proportional to absolute temperature (PTAT) characteristic, and a feedback amplifier is designed with weak-inversion transistors for low voltage operation. It is verified with a $0.18-{\mu}m$ CMOS process with five corners for MOS transistors and three corners for BJTs. The proposed circuit is superior to other reported current references under temperature variation from $-40^{\circ}C$ to $120^{\circ}C$ and power supply variation from 1.2 V to 1.8 V. The total power consumption is $126{\mu}W$ under the conditions that the power supply voltage is 1.2 V, the output current is $10{\mu}A$, and the operating temperature is $20^{\circ}C$.

Control and Design of a Arc Power Supply for KSTAR's the Neutral Beam Injection

  • Ryu, Dong-Kyun;Lee, Hee-Jun;Lee, Jung-Hyo;Won, Chung-Yuen
    • Journal of Electrical Engineering and Technology
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    • 제10권1호
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    • pp.216-226
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    • 2015
  • The neutral beam injection generate ultra-high temperature energy in the tokamak of nuclear fusion. The neutral beam injection make up arc power supply, filament power supply and acceleration & deceleration power supply. The arc power supply has characteristics of low voltage and high current. Arc power supply generate arc through constant output of voltage and current. So this paper proposed suitable buck converter for low voltage and high current. The proposed buck converter used parallel switch because it can be increased capacity and decrease conduction loss. When an arc generated, the neutral beam injection chamber occur high voltage. And it will break output capacitor of buck converter. Therefore the output capacitor was removed in the proposed converter. Thus the proposed converter should be designed for the characteristics of low voltage and high current. Also, the arc power supply should be guaranteed for system stability. The proposed parallel buck converter enables the system stability of the divided low output voltage and high current. The proposed converter with constant output be the most important design of the output inductor. In this paper, designed arc power supply verified operation of system and stability through simulation and prototype. After it is applied to the 288[kW] arc power supply for neutral beam injection.

Data Supply Voltage Reduction Scheme for Low-Power AMOLED Displays

  • Nam, Hyoungsik;Jeong, Hoon
    • ETRI Journal
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    • 제34권5호
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    • pp.727-733
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    • 2012
  • This paper demonstrates a new driving scheme that allows reducing the supply voltage of data drivers for low-power active matrix organic light-emitting diode (AMOLED) displays. The proposed technique drives down the data voltage range by 50%, which subsequently diminishes in the peak power consumption of data drivers at the full white pattern by 75%. Because the gate voltage of a driving thin film transistor covers the same range as a conventional driving scheme by means of a level-shifting scheme, the low-data supply scheme achieves the equivalent dynamic range of OLED currents. The average power consumption of data drivers is reduced by 60% over 24 test images, and power consumption is kept below 25%.

이중 부스팅 회로를 이용한 저전압 SRAM (A low voltage SRAM using double boosting scheme)

  • 정상훈;엄윤주;정연배
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2005년도 추계종합학술대회
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    • pp.647-650
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    • 2005
  • In this paper, a low voltage SRAM using double boosting scheme is described. A low supply voltage deteriorates the static noise margin (SNM) and the cell read-out current. For read/write operation, a selected word line and cell VDD bias are boosted in a different level using double boosting scheme. This increases not only the static noise margin but also the cell readout current at a low supply voltage. A low voltage SRAM with 32K ${\times}$ 8bit implemented in a 0.18um CMOS technology shows an access time of 26.1ns at 0.8V supply voltage.

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저전압대전류(低電壓大電流) DC-DC 컨버터 기술동향(技術動向) (Trend of low voltage and high current Technology for DC-DC Converters)

  • 영목정태랑
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2002년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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    • pp.3-11
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    • 2002
  • This paper presents the trend of low voltage and high current technology for DC-DC converters. It can be said that the output voltage of the on-board power supply has been rapidly moving forward a low voltage in proportion to the minuteness of the semiconductors. As for as its speed is concerned, the change of the market situation seems to be faster than that of R&D for the low voltage and high current products put out by power supply manufacturers. Here, the present situation and the trend of non-isolated type step-down DC-DC converter and isolated type DC-DC converter called "Brick" will be taken up mainly from the fellowing point of view. -low voltage and high current keeping up with the current demand for the latest telecommunication networks and broadband. -build-up of the total solution for dispersion system power supply. In this paper, an explanation is given to mainly concerning to the newest products in the supplier's position.

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A CMOS Single-Supply Op-Amp Design For Hearing Aid Application

  • Jarng, Soon-Suck;Chen, Lingfen;Kwon, You-Jung
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2005년도 ICCAS
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    • pp.206-211
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    • 2005
  • The hearing aids specific operational amplifier described in this paper is a single-supply, low voltage CMOS amplifier. It works on 1.3V single-supply and gets a gain of 82dB. The 0.18${\mu}m$ CMOS process was chosen to reduce the driven voltage as well as the power dissipation.

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Low Drop-Out (LDO) Voltage Regulator with Improved Power Supply Rejection

  • Jang, Ho-Joon;Roh, Yong-Seong;Moon, Young-Jin;Park, Jeong-Pyo;Yoo, Chang-Sik
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제12권3호
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    • pp.313-319
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    • 2012
  • The power supply rejection (PSR) of low drop-out (LDO) voltage regulator is improved by employing an error amplifier (EA) which is configured so the power supply noise be cancelled at the output. The LDO regulator is implemented in a 0.13-${\mu}m$ standard CMOS technology. The external supply voltage level is 1.2-V and the output is 1.0-V while the load current can range from 0-mA to 50-mA. The power supply rejection is 46-dB, 49-dB, and 38-dB at DC, 2-MHz, and 10-MHz, respectively. The quiescent current consumption is 65-${\mu}A$.