• Title/Summary/Keyword: Low computation

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A Case Study of a Navigator Optimization Process

  • Cho, Doosan
    • International journal of advanced smart convergence
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    • v.6 no.1
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    • pp.26-31
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    • 2017
  • When mobile navigator device accesses data randomly, the cache memory performance is rapidly deteriorated due to low memory access locality. For instance, GPS (General Positioning System) of navigator program for automobiles or drones, that are currently in common use, uses data from 32 satellites and computes current position of a receiver. This computation of positioning is the major part of GPS which accounts more than 50% computation in the program. In this computation task, the satellite signals are received in real time and stored in buffer memories. At this task, since necessary data cannot be sequentially stored, the data is read and used at random. This data accessing patterns are generated randomly, thus, memory system performance is worse by low data locality. As a result, it is difficult to process data in real time due to low data localization. Improving the low memory access locality inherited on the algorithms of conventional communication applications requires a certain optimization technique to solve this problem. In this study, we try to do optimizations with data and memory to improve the locality problem. In experiment, we show that our case study can improve processing speed of core computation and improve our overall system performance by 14%.

New systolic arrays for computation of the 1-D and 2-D discrete wavelet transform (1차원 및 2차원 이산 웨이브렛 변환 계산을 위한 새로운 시스톨릭 어레이)

  • 반성범;박래홍
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.34S no.10
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    • pp.132-140
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    • 1997
  • This paper proposes systolic array architectures for compuataion of the 1-D and 2-D discrete wavelet transform (DWT). The proposed systolic array for compuataion of the 1-D DWT consists of L processing element (PE) arrays, where the PE array denotes the systolic array for computation of the one level DWT. The proposed PE array computes only the product terms that are required for further computation and the outputs of low and high frequency filters are computed in alternate clock cycles. Therefore, the proposed architecuter can compute the low and high frequency outputs using a single architecture. The proposed systolic array for computation of the 2-D DWT consists of two systolic array architectures for comutation of the 1-D DWT and memory unit. The required time and hardware cost of the proposed systolic arrays are comparable to those of the conventional architectures. However, the conventional architectures need extra processing units whereas the proposed architectures fo not. The proposed architectures can be applied to subband decomposition by simply changing the filter coefficients.

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Design and Implementation of Low-Power DCT Architecture by Minimizing Switching Activity (스위칭 엑티비티를 최소화한 저전력 DCT 아키텍쳐 구현)

  • Kim San;Park Jong-Su;Lee Yong-Joo;Lee Yong-Surk
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.6C
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    • pp.603-613
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    • 2006
  • Low-power design is one of the most important challenges encountered in maximizing battery life in portable devices as well as saving energy during system operation. In this paper we propose a low-power DCT (Discrete Cosine Transform) architecture using a modified Computation Sharing Multiplication (CSHM). The overall rate of Power consumption is reduced during DCT: the proposed architecture does not perform arithmetic operations on unnecessary bits during the Computation Sharing Multiplication calculations. Experimental results show that it is possible to reduce power dissipation up to about $7\sim8%$ without compromising the final DCT results. The proposed low-power DCT architecture can be applied to consumer electronics as well as portable multimedia systems requiring high throughput and low-power.

Scalable Path Computation Flooding Approach for PCE-Based Multi-domain Networks

  • Perello, Jordi;Hernandez-Sola, Guillem;Agraz, Fernando;Spadaro, Salvatore;Comellas, Jaume
    • ETRI Journal
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    • v.32 no.4
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    • pp.622-625
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    • 2010
  • In this letter, we assess the scalability of a path computation flooding (PCF) approach to compute optimal end-to-end inter-domain paths in a path computation element-based multi-domain network. PCF yields a drastically reduced network blocking probability compared to a blind per-domain path computation but introduces significant network control overhead and path computation complexity. In view of this, we introduce and compare an alternative low overhead PCF (LoPCF) solution. From the obtained results, LoPCF leads to similar blocking probabilities to PCF while exhibiting around 50% path computation complexity and network control overhead reduction.

Adaptive Application Component Mapping for Parallel Computation Offloading in Variable Environments

  • Fan, Wenhao;Liu, Yuan'an;Tang, Bihua
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.9 no.11
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    • pp.4347-4366
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    • 2015
  • Distinguished with traditional strategies which offload an application's computation to a single server, parallel computation offloading can promote the performance by simultaneously delivering the computation to multiple computing resources around the mobile terminal. However, due to the variability of communication and computation environments, static application component multi-partitioning algorithms are difficult to maintain the optimality of their solutions in time-varying scenarios, whereas, over-frequent algorithm executions triggered by changes of environments may bring excessive algorithm costs. To this end, an adaptive application component mapping algorithm for parallel computation offloading in variable environments is proposed in this paper, which aims at minimizing computation costs and inter-resource communication costs. It can provide the terminal a suitable solution for the current environment with a low incremental algorithm cost. We represent the application component multi-partitioning problem as a graph mapping model, then convert it into a pathfinding problem. A genetic algorithm enhanced by an elite-based immigrants mechanism is designed to obtain the solution adaptively, which can dynamically adjust the precision of the solution and boost the searching speed as transmission and processing speeds change. Simulation results demonstrate that our algorithm can promote the performance efficiently, and it is superior to the traditional approaches under variable environments to a large extent.

Low Computation Complexity Block Based Nonideality and Cross-talk Compensations for LCD Backlight

  • Han, Won-Jin;You, Jae-Hee
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.1316-1318
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    • 2009
  • Nonideality of LED lens and diffuser as well as crosstalk between backlights should be compensated because they have large effects on image qualities. The computation complexities of conventional compensations are greatly increased as resolution becomes higher. The block based compensation is proposed to alleviate the computation complexity considering backlight profiles and image pixel characteristics.

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The Voltage drops computation program on distributed random loads (분산부하 전압강하 계산 프로그램)

  • Kang, Cha-Nyeong
    • Proceedings of the KIEE Conference
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    • 2005.07e
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    • pp.12-15
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    • 2005
  • The subject of this research is not only to examine effects on electrical wiring that voltage drops make in low voltage load facilities found in apartments, buildings street lightings, factories, and etc, but also to discuss the voltage drops computation program on distributed random loads to optimize their safety and economy.

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Improvement of Power Consumption of Canny Edge Detection Using Reduction in Number of Calculations at Square Root (제곱근 연산 횟수 감소를 이용한 Canny Edge 검출에서의 전력 소모개선)

  • Hong, Seokhee;Lee, Juseong;An, Ho-Myoung;Koo, Jihun;Kim, Byuncheul
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.13 no.6
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    • pp.568-574
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    • 2020
  • In this paper, we propose a method to reduce the square root computation having high computation complexity in Canny edge detection algorithm using image processing. The proposed method is to reduce the number of operation calculating gradient magnitude using pixel's continuity using make a specific pattern instead of square root computation in gradient magnitude calculating operation. Using various test images and changing number of hole pixels, we can check for calculate match rate about 97% for one hole, and 94%, 90%, 88% when the number of hole is increased and measure decreasing computation time about 0.2ms for one hole, and 0.398ms, 0.6ms, 0.8ms when the number of hole is increased. Through this method, we expect to implement low power embedded vision system through high accuracy and a reduced operation number using two-hole pixels.

Mixing algorithm for attitude computation of underwater vehicle using fuzzy theory (퍼지 이론을 이용한 수중 운동체의 자세계산 혼합 알고리즘)

  • 김영한;이장규;한형석
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.45 no.2
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    • pp.265-272
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    • 1996
  • In this paper, attitude computation algorithm for a strap down ARS(Attitude Reference System)of an underwater vehicle has been studied. Attitude errors o the ARS using low-level gyroscopes tend to increase with time due to gyroscope errors. To cope with this problem, a mixing algorithm of accelerometer aided attitude computation has been developed. The algorithm can successfully bound the error increase for cruising motion, but it gives instantaneously large errors when a vehicle maneuvers. To improve the performance in case of vehicle's maneuver, a new attitude computation mixing algorithm complying state of vehicle and to manage the adjustment of the gains which are invariant in the existing algorithm. In addition, a gain scheduling method is applied to fuzzy inference composition process for real-time computation. Monte Carlo simulation results show that the proposed algorithm provides better performance than the existing algorithm.

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Software-Defined Cloud-based Vehicular Networks with Task Computation Management

  • Nkenyereye, Lionel;Jang, Jong-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2018.05a
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    • pp.419-421
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    • 2018
  • Cloud vehicular networks are a promising paradigm to improve vehicular through distributing computation tasks between remote clouds and local vehicular terminals. Software-Defined Network(SDN) can bring advantages to Intelligent Transportation System(ITS) through its ability to provide flexibility and programmability through a logically centralized controlled cluster that has a full comprehension of view of the network. However, as the SDN paradigm is currently studied in vehicular ad hoc networks(VANETs), adapting it to work on cloud-based vehicular network requires some changes to address particular computation features such as task computation of applications of cloud-based vehicular networks. There has been initial work on briging SDN concepts to vehicular networks to reduce the latency by using the fog computing technology, but most of these studies do not directly tackle the issue of task computation. This paper proposes a Software-Defined Cloud-based vehicular Network called SDCVN framework. In this framework, we study the effectiveness of task computation of applications of cloud-based vehicular networks with vehicular cloud and roadside edge cloud. Considering the edge cloud service migration due to the vehicle mobility, we present an efficient roadside cloud based controller entity scheme where the tasks are adaptively computed through vehicular cloud mode or roadside computing predictive trajectory decision mode. Simulation results show that our proposal demonstrates a stable and low route setup time in case of installing the forwarding rules of the routing applications because the source node needs to contact the controller once to setup the route.

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