• Proceedings of the KIEE Conference
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• 2003.07a
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• pp.33-35
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• 2003

Capacitor switching is essential for the economic operation, and proper voltage control of KOREA electric utility distribution system. Voltage transients produced by capacitor switching (around 2.0 per unit at substation and 2.5 or less per unit at customer site, and lasting less then 1ms) do not have the magnitude or duration to interfere with the operation of computers, but they do disrupt the operation of adjustable speed drivers. The result of our research, ASD manufacturers should team from the computer industry and design products that will operate satisfactory in the electrical envelopment in which they will be placed. In this case history, the inductors on the input to ADSs in order to prevent nuisance tripping from capacitor switching(and other causes within the apartment) proved to be an effective, low-cost solution.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.542-546
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• 2004

This paper presents a technique to reduce the low frequency ripple voltage of the dc output in a BIFRED converter with a small-sized energy storage capacitor. The proposed pulse width control method can be effectively used to suppress the low frequency ripple appeared in the dc output and still shows generally good performance such as low THD of input line current and high power factor. Using the small-sized energy storage capacitor, it has better merits of low cost and small size than a conventional BIFRED converter. The proposed technique is illustrated its validity and effectiveness through simulations.

• Journal of Power Electronics
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• v.9 no.6
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• pp.823-834
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• 2009

This paper proposes a high-efficiency single-stage ac/dc converter. The proposed converter features low voltage stresses and reduced switching losses. It operates at the boundary of discontinuous- and continuous-conduction modes by employing variable switching frequency control. The turn-on switching loss of the switch can be reduced by turning it on when the voltage across it is at a minimum. The voltage across the bulk capacitor is independent of the output loads and maintained within the practical range for the universal line input, so the problem of high voltage stress across the bulk capacitor is alleviated. Moreover, the voltage stress of the output diodes is clamped to the output voltage, and the output diodes are turned off at zero-current. Thus, the reverse-recovery related losses of the output diodes are eliminated. The operational principles and circuit analysis are presented. A prototype circuit was built and tested for a 150 W (50V/3A) output power. The experimental results verify the performance of the proposed converter.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.24 no.4
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• pp.43-49
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• 2010

Power capacitor has been used to compensate for the low power factor of inductive load and to reduce harmonics generated by the power conversion device with reactor. The increase of voltage and current and thermal generation are extremely hard on the life of condenser. Current will be increased, provided that voltage and frequency of condenser increase also. The increase of voltage and frequency justly extends thermal generation. Both act on insulation stress and can afford to premature fault In this paper, we measured thermal distribution of condenser with infrared rays camera in case of variance of voltage and frequency. We were assured that the increase of voltage and frequency produces high heat and exceedingly shortens the life of condenser.

• Journal of Power Electronics
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• v.6 no.1
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• pp.45-51
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• 2006

A new high efficiency phase shifted full bridge (PSFB) converter for the power sustaining module of a plasma display panel (PDP) is proposed in this paper. The proposed converter employs a voltage doubler rectifier without an output inductor. Since it has no output inductor, the voltage stresses of the secondary rectifier diodes can be clamped at the output voltage level. No dissipative resistor-capacitor (RC) snubber for rectifier diodes is needed. Therefore, high efficiency, as well as, a low noise output voltage can be realized. Due to the elimination of the large output inductor, it features a simple structure, lower cost, smaller mass and lighter weight. Furthermore, the proposed converter has wide zero voltage switching (ZVS) ranges with low current stresses of the primary switches. Also the resonance between the leakage inductor of the transformer and the capacitor of the voltage doubler cell reduces the current stresses of the rectifier diodes. In this paper, operational principles, an analysis of the proposed converter and experimental results are presented.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.4
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• pp.543-550
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• 2008

This paper proposes an voltage and reactive power control methodology, which is motivated towards implementation in the korea power system. The main voltage control devices are capacitor banks, reactor banks and LTC transformers. Effects of control devices are evaluated by local subsystem's cost computations. This local subsystem is decided by 'Tier' and 'Electrical distance' in the whole system. The control objective at present is to keep the voltage profile within constraints with minimum switching cost. A robust control strategy is proposed to make the control feasible and optimal for a set of power-flow cases that may occur important event from system. This studies conducted for IEEE 39-bus low and high voltage contingency cases indicate that the proposed control methodology is much more effective than PSS/E simulation tool in deciding switching of capacitor and reactor banks.

• KIEE International Transactions on Electrophysics and Applications
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• v.2C no.5
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• pp.253-257
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• 2002

A new Current-Controlled Driving Method that can drive AC PDPs with low voltage and high luminous efficiency for the sustaining period is presented. In this driving method, the voltage source is connected to a storage capacitor and the stored voltage is delivered to the panel through LC resonance. Thus, this driving method can drive the panel with a voltage source as low as about half of the voltage necessary in the conventional driving methods. The discharge current flowing into the AC PDP is limited in this method. Thus, the power consumption for the discharge is reduced and the discharge input power to output luminance efficiency is improved. Experimental results using this driving method showed that we could drive an AC PDP with a voltage source as low as 146V and that high luminous efficiency of 1.33 1m／W can be achieved.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.1
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• pp.197-204
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• 2010

This paper proposes a new body-effect compensated switch configuration for low voltage and low distortion switched-capacitor (SC) applications. The proposed circuit allows rail-to-rail switching operation for low voltage SC circuits and has better total harmonic distortion than the conventional bootstrapped circuit by 19 dB. A 2-1 cascaded sigma-delta modulator is provided for performing the high-resolution analog-to-digital conversion on audio codec in a communication transceiver. An experimental prototype for a single-stage folded-cascode operational amplifier (opamp) and a 2-1 cascaded sigma-delta modulator has been implemented m a 0.25 micron double-poly, triple-metal standard CMOS process with 2.7 V of supply voltage. The 1% settling time of the opamp is measured to be 560 ns with load capacitance of 16 pF. The experimental testing of the sigma-delta modulator with bit-stream inspection and analog spectrum analyzing plot is performed. The die size is $1.9{\times}1.5\;mm$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.1
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• pp.15-24
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• 2012

In this paper, we suggest the dynamic-response-free SMPS using a new high-resolution DPWM generator based on switched-capacitor delay technique. In the proposed system, duty ratio of DPWM is controlled by voltage slope of an internal capacitor using switched-capacitor delay technique. In the proposed circuit, it is possible to track output voltage by controlling current of the internal capacitor of the DPWM generator through comparison between the feedback voltage and the reference voltage. Therefore the proposed circuit is not restricted by the dynamic-response characteristic which is a problem in the existing SMPS using the closed-loop control method. In addition, it has great advantage that ringing phenomenon due to overshoot/undershoot does not appear on output voltage. The proposed circuit can operate at switching frequencies of 1MHz~10MHz using internal operating frequency of 100 MHz. The maximum current of the core circuit is 2.7 mA and the total current of the entire circuit including output buffer is 15 mA at the switching frequency of 10 MHz. The proposed circuit has DPWM duty ratio resolution of 0.125 %. It can accommodate load current up to 1 A. The maximum ripple of output voltage is 8 mV. To verify operation of the proposed circuit, we carried out simulation with Dongbu Hitek BCD $0.35{\mu}m$ technology parameter.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.61 no.4
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• pp.186-191
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• 2012

DC Bus Electrolytic capacitors have been widely used in power conversion system because they can achieve high capacitance and voltage ratings with volumetric efficiency and low cost. This type of capacitors have been traditionally used for filtering, voltage smoothing, by-pass and other many applications in power conversion circuits requiring a cost effective and volumetric efficiency components. Unfortunately, electrolytic capacitors are some of the weakest components in power electronic converter. Many papers have proposed different methods or algorithms to determinate the ESR and/or capacitance C for fault diagnosis of the electrolytic capacitor. However, both ESR and C vary with frequency and temperature. Accurate knowledge of both values at the capacitors operating conditions is essential to achieve the best reference data of fault judgement. According to parameter analysis, the capacitance increases with temperature and the ESR decreases. Higher frequencies make the ESR and C to decrease. Analysis results show that the proposed electrolytic capacitor parameter estimation technique can be applied to reference signal of capacitor diagnosis systems successfully.