• Journal of IKEEE
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• v.22 no.1
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• pp.174-179
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• 2018

In this paper, design of high-efficiency DC-DC converter is presented for low-power PMIC (power management integrated circuit). As PMIC technologies for IoT and wearable devices have been continuously improved, high-efficiency energy harvesting schemes should be essential. Since the supply voltage resulting from energy harvesting is low and widely variable, design techniques to achieve high efficiency over a wide input voltage range are required. To obtain a constant switching frequency for wide input voltage range, frequency compensation circuit using supply-voltage variation sensing circuit is included. In order to obtain high efficiency performance at very low-power condition, accurate burst-mode control circuit was adopted to control switching operations. In the proposed DC-DC buck converter, output voltage is set to be 0.9V at the input voltage of 0.95~3.3V and maximum measured efficiency is up to 78% for the load current of 180uA.

• JOURNAL OF ELECTRICAL WORLD
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• s.452
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• pp.22-28
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• 2014

• Journal of the Microelectronics and Packaging Society
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• v.24 no.3
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• pp.63-69
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• 2017

This paper presents a highly efficient power management system for UAV-drones. For free from the battery cell-balancing issue, the proposed system allows the drone to utilize a single-cell Li-Po battery. To realize low-voltage input of 3.7V, the switch-mode step-up DC-DC converter is optimally designed with high power efficiency. The prototype DC-DC converter was implemented with an output voltage of 5V, which will be provided to digital parts of the drone. The power efficiency was measured to be max. 91.3% with low surface temperature. The measured line and load regulations were 0.02V/V and 0.15V/A, respectively. Thanks to the proposed power management system, the available time-to-fly of the drone is expected to be significantly extended in virtue of the enhanced power efficiency.

• Journal of the Korea Society of Computer and Information
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• v.26 no.11
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• pp.11-19
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• 2021

In this paper, we propose a prototype platform combined with the power management system using, as an auxiliary power storage device, a supercapacitor that can be fast charged and discharged with high power efficiency as well as semi-permanent charge and discharge cycle life. For the proposed platform, we designed a technique which is capable of detecting the state of power cutoff or resumption of power supplied from the solar panel in accordance with physical environment changes through an interrupt attached to the micro-controller was developed. To prevent data loss in a computing environment in which continuous power supply is not guaranteed, we implemented a low-level system software in the micro-controller to transfer program context and data in volatile memory to nonvolatile memory when power supply is cut off. Experimental results shows that supercapacitors effectively supply temporary power as auxiliary power storage devices. Various benchmarks also confirm that power state detection and transfer of program context and data from volatile memory to nonvolatile memory have low overhead.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.1
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• pp.196-200
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• 2015

The switching noise in the power electronics of the power conversion equipment (Power Conditioning System) for large energy storage devices are generated. Since the burst-level transient noise from being generated in the power system at a higher power change process influences the control circuit of the low voltage driver circuit. Noise may cause the malfunction of the control device even if no dielectric breakdown leads to a control circuit. To overcome this, this paper proposes the installation of an additional nano-surge protection device on the power supply DC output circuit of the battery management unit.

• Journal of Internet of Things and Convergence
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• v.8 no.4
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• pp.1-7
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• 2022

As the number of IoT devices increases, power management of the cluster head, which acts as a gateway between the cluster and sink nodes in the IoT network, becomes crucial. Particularly when the cluster head is a mobile wireless terminal, the power consumption of the IoT network must be minimized over its lifetime. In addition, the delay of information transmission in the IoT network is one of the primary metrics for rapid information collecting in the IoT network. In this paper, we propose a low-power buffer management algorithm that takes into account the information transmission delay in an IoT network. By forwarding or skipping received packets utilizing deep Q learning employed in deep reinforcement learning methods, the suggested method is able to reduce power consumption while decreasing transmission delay level. The proposed approach is demonstrated to reduce power consumption and to improve delay relative to the existing buffer management technique used as a comparison in slotted ALOHA protocol.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.23 no.2
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• pp.339-346
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• 2013

As the need for security of SCADA systems is increasing, significant progress has been made in research on security of control protocol. However, very few security solutions were adapted to legacy SCADA system. The reasons for non-adoption are latency, cost and key management problem. We propose a low latency, economic security Solution to solve these issues. The proposed solution performs security function in data link layer and has minimum overhead to minimize latency. Furthermore, we try to solve the key management problem by providing systematic security keys and key distribution method.

• Journal of Korean Society for Atmospheric Environment
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• v.10 no.E
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• pp.299-302
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• 1994

At a nuclear power plant, environmental radioactivity monitoring is routine work for the radiation safety management For the environmental monitoring of tritium($^3$H) activity in water sampled liquid scintillation counting( LSC) method is applied to measure low- energy beta activity from tritium in the samples. The $^3$H activity is measured using the BECKMAN 5801 system at the KRISS( Korea Research Institute of Standards and Science) for evaluating the lower limits of detection( LLD) of $^3$H measurement and the measuring capability of low-level $^3$H activity at four nuclear Power Plant sites. The LSC systems used for low-level $^3$H activity measurements at the nuclear Power Plants are confirmed to satisfy throughout an intercomparison study under the experimental arrangements by the KRISS.

• Journal of Korea Society of Digital Industry and Information Management
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• v.14 no.3
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• pp.29-38
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• 2018

It is the approach of embedded system design that analyzes COS(Cut Out Switch) failure in the power distribution and an instantaneous breakdown of power distribution supply could cause the weakness of industrial competence and therefore we need to feed the stable power distribution with developing the technology of open-source embedded system. In this paper, we apply the LoRa technology which is the Internet of Things(IoT) protocol for low data rate, low power, low cost and long range sensor applications. We designed the hardware and software architecture setup and experimented the embedded system with network architecture and COS monitoring system including accelerometer for detecting the failure of distribution line and sensing the failure of its fuse holder by recognizing the variation and collision and afterwards sending the information to a gateway. With experimenting we designed the embedded platform for sensing the variation and collision according to the COS failure, monitoring its fuse holder status and transferring the information of states with LoRa technology.

• Journal of Computing Science and Engineering
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• v.6 no.2
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• pp.79-88
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• 2012

Power continues to be a driving force in central processing units (CPU) design. Most of the advanced breakthroughs in power have been in a realm that is applicable to workstation CPUs. Advanced power management systems will manage temperature, dynamic voltage scaling and dynamic frequency scaling in a CPU. The use of power management systems for microcontrollers and embedded CPUs has been modest, and mostly focuses on very large scale integration (VLSI) level optimizations compared to system level optimizations. In this paper, a dynamic frequency controlling (DFC) technique is introduced, to lay the foundation of a system level power management system for commercial microcontrollers. The DFC technique allows a commercial microcontroller to have minor modifications on both the hardware and software side, to allow the clock frequency to change to save power; results in this study show a 10% savings. By adding an additional layer of software abstraction at the interrupt level, the microcontroller can operate without having knowledge of the current clock frequency, and this can be accomplished without having to use an embedded operating system.