• 한국전자파학회논문지
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• 제23권6호
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• pp.682-690
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• 2012

본 논문은 2차 고조파 주입을 적용한 고선형의 균형적인 자체 발진 혼합기(SOM)를 제안하였다. 제안한 SOM은 발진을 위하여 균형적 공진기 구조인 H-슬롯 결함 접지면 구조로 설계하였다. H-슬롯 결함 접지면 구조는 높은 Q 계수를 가지므로 발진기의 낮은 위상 잡음을 제공하기에 적합한 구조이다. 혼합기는 균형적 국부발진기(LO) 신호가 RF 입력 포트에 영향을 주면 안 되므로 LO-RF 신호의 격리에 좋은 단일 평형 혼합기를 활용하였다. 또한, 제안한 SOM은 선형성 향상을 위해 IF의 2차 고조파 주입을 위하여 서로 다른 피드백 경로를 사용하는 두 가지 방법을 제안하였다. 첫 번째 방법은 입력 파워 -20 dBm의 5 GHz RF 입력 신호일 때 226 MHz IF에서 3.08 dB의 변환 이득을 실현하였고, 두 번째 방법으로는 입력 파워 -20 dBm의 5.2 GHz RF 입력 신호일 때 423 MHz IF에서 2 dB의 변환 이득을 달성하였다. 두 가지 방법 대한 측정 결과, 3차 혼변조 왜곡(IMD3)는 각각 61.8 dB, 65 dB로 나타났다. 따라서 제안한 SOM은 2차 고조파 주입 기술을 적용하지 않은 것에 비해 두 가지 방법 각각 IMD3가 18.8 dB, 21 dB로 개선되었으므로 향상된 선형성을 보여준다.

• 한국재료학회지
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• 제26권8호
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• pp.427-429
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• 2016

A multi-step deposition process for the gap-filling of submicrometer trenches using dimethyldimethoxysilane (DMDMOS), $(CH_3)_2Si(OCH_3)_2$, and $C_xH_yO_z$ by plasma enhanced chemical vapor deposition (PECVD) is presented. The multi-step process consisted of pre-treatment, deposition, and post-treatment in each deposition step. We obtained low-k films with superior gap-filling properties on the trench patterns without voids or delamination. The newly developed technique for the gap-filling of submicrometer features will have a great impact on inter metal dielectric (IMD) and shallow trench isolation (STI) processes for the next generation of microelectronic devices. Moreover, this bottom up gap-fill mode is expected to be universally for other chemical vapor deposition systems.

• 한국재료학회지
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• 제26권9호
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• pp.455-459
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• 2016

The deposition process for the gap-filling of sub-micrometer trenches using DMDMOS, $(CH_3)_2Si(OCH_3)_2$, and $C_xH_yO_z$ by flowable chemical vapor deposition (F-CVD) is presented. We obtained low-k films that possess superior gap-filling properties on trench patterns without voids or delamination. The newly developed technique for the gap-filling of submicrometer features will have a great impact on IMD and STI for the next generation of microelectronic devices. Moreover, this bottom up gap-fill mode is expected to be universal in other chemical vapor deposition systems.

• JSTS:Journal of Semiconductor Technology and Science
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• 제8권4호
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• pp.283-288
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• 2008

A post-linearization technique for the differrential CMOS LNA is presented. The proposed method uses an additional cross-coupled common-source FET pair to cancel out the third-order intermodulation ($IM_3$) current of the main differential amplifier. This technique is applied to enhance the linearity of CMOS LNA using $0.18-{\mu}m$ technology. The LNA achieved +10.2 dBm IIP3 with 13.7 dB gain and 1.68 dB NF at 2 GHz consuming 11.8 mA from a 1.8-V supply. It shows IIP3 improvement by 6.6 dB over the conventional cascode LNA without the linearizing circuit.

• Journal of electromagnetic engineering and science
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• 제2권2호
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• pp.93-99
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• 2002

The Cartesian loop chip which is one of key devices in narrow-band Walky-Talky transmitter using RZ-SSB modulation method was designed and implemented with 0.35 Um CMOS technology. The reduced size and low cost of transmitter were available by the use of direct-conversion and Cartesian loop chip, which improved the power efficiency and linearity of transmitting path. In addition, low power operation was possible through CMOS technology. The performance test results of transmitter showed -23 dBc improvement of IMD level and -30 dEc below suppression of SSB characteristic in the operation of Cartesian loop chip (closed-loop). At that time, the transmitting power was about 37 dBm (5 W). The main parameters to improve the transmitting characteristic and to compensate the distortion in feed back loop such as DC-offset, loop gain and phase value are interfaced with notebook PC to be controlled with S/W.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 추계학술대회 논문집 전기물성,응용부문
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• pp.158-159
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• 2006

The resistance-capacitance (RC) delay of signals through interconnection materials becomes a big hurdle for high speed operation of semiconductors which contain multilayer interconnection layers. In order to reduce the RC delay, low-k materials will be used for inter-metal dielectric (IMD) materials. We have developed self-consistent simulation tool that includes neutral-species transport model, based on the relaxation continuum (RCT) model. We present the parametric study of the modeling results of a two-frequency capacitively coupled plasma (2f-CCP) with $N_2/H_2$ gas mixture that is known as promising one for organic low-k materials etching. We include the neutral transport model as well as plasma one in the calculation. The plasma and neutrals are calculated self-consistently by iterating the simulation of both species till a spatiotemporal steady state profile could be obtained.

• 센서학회지
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• 제32권6호
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• pp.432-440
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• 2023

This study introduces an efficient readout circuit designed for two-electrode electrocardiogram (ECG) recording, characterized by its low-noise and low-power consumption attributes. Unlike its three-electrode counterpart, the two-electrode ECG is susceptible to common-mode interference (CMI), causing signal distortion. To counter this, the proposed circuit integrates a common-mode charge pump (CMCP) with a window comparator, allowing for a CMI tolerance of up to 20 V_PP. The CMCP design prevents the activation of electrostatic discharge (ESD) diodes and becomes operational only when CMI surpasses the predetermined range set by the window comparator. This ensures power efficiency and minimizes intermodulation distortion (IMD) arising from switching noise. To maintain ECG signal accuracy, the circuit employs a chopper-stabilized instrumentation amplifier (IA) for low-noise attributes, and to achieve high input impedance, it incorporates a floating high-pass filter (HPF) and a current-feedback instrumentation amplifier (CFIA). This comprehensive design integrates various components, including a QRS peak detector and serial peripheral interface (SPI), into a single 0.18-㎛ CMOS chip occupying 0.54 mm². Experimental evaluations showed a 0.59 µV_RMS noise level within a 1-100 Hz bandwidth and a power draw of 23.83 µW at 1.8 V.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제55권12호
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• pp.601-605
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• 2006

The resistance-capacitance (RC) delay of signals through interconnection materials becomes a big hurdle for high speed operation of semiconductors which contain multi-layer interconnections in smaller scales with higher integration density. Low-k materials are applied to the inter-metal dielectric (IMD) materials in order to overcome the RC delay. Relaxation continuum (RCT) model that includes neutral-species transport model have developed to model the etching process in a capacitively coupled plasma (CCP) device. We present the parametric study of the modeling results of a two-frequency capacitively coupled plasma (2f-CCP) with $N_2/H_2$ gas mixture that is known as promising one for organic low-k materials etching. For the etching of low-k materials by $N_2/H_2$ plasma, N and H atoms have a big influence on the materials. Moreover the distributions of excited neutral species influence the plasma density and profile. We include the neutral transport model as well as plasma one in the calculation. The plasma and neutrals are calculated self-consistently by iterating the simulation of both species till a spatio-temporal steady state profile could be obtained.

• 한국정보통신학회논문지
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• 제9권2호
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• pp.422-427
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• 2005

본 논문에서는 무선 네트워크 장비에도 적용 가능한 WCDMA 중계기용 전력증폭기의 선형성 및 효율을 향상시키기 위한 도허티증폭기를 구현하였다. 입력 전력의 변화에 따라 고효율 전력증폭기를 구현하고자 능동 로드풀을 이용한 도허티 기술을 이용하고 기존의 증폭기의 낮은 효율 구간에서도 우수한 선형성과 고효율을 유지하도록 설계하였다. WCDMA 주파수 대역인 2.11$\~$2.17 CHz에서 CW 1-tone 실험 결과 치대 출력 전력 52.3 dBm에서 6dBm 백 오프 지점부터 50$\%$의 전력 부가 효율을 갖게 하여 기존의 AB급에 비해 13.3$\%$ 이상의 높은 효율을 가졌다. 또한 게이트 바이어스 조절을 통하여 선형성 개선의 최적 바이어스 점을 찾은 후 도허티증폭기에서는 4dB 이상의 IMD3가 개선됨을 알 수 있었다.

• 대한전자공학회논문지TC
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• 제42권9호
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• pp.1-10
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• 2005

본 논문에서는 디지털 방식으로 온도에 의한 왜곡을 보상할 수 있는 사전왜곡제거기 알고리듬을 제안하였다. 사전왜곡제거 알고리듬은 입력레벨에 따른 시스템 비선형 왜곡뿐만 아니라 온도에 따른 왜곡의 보상성분을 산출하여 베이스밴드 영역의 디지털 신호를 사전 왜곡함으로써 발생하는 왜곡을 상쇄시키는 알고리듬이다. 이와 같은 알고리듬의 우수성을 증명하기 위해 Saleh의 고출력 증폭기 모델에 적용하여 컴퓨터 모의실험을 한 결과, 기존의 A&P PD 방식보다 P1dB는 약 0.5dBm 증가하였고, 위상천이는 약 $0.8^{o}$ 감소하였으며, 온도보상 기법을 적용한 사전왜곡제거기 로 증폭기의 PldB를 약 2dBm 개선하였고, 위상천이는 약$0.1^{o}$ 이하로 안정시켰다. 또한 이 증폭기에 UMTS 신호 샘플을 인가 시 온도보상 기법을 적용한 사전왜곡 제거기의 IMD3가 온도보상 기법을 적용하지 않은 경우보다 10dBm 감소하였으며, 왜곡제거기가 없는 신호보다 19dBm 감소시킴으로써 우수한 선형성을 보였다.