• Title/Summary/Keyword: Low Complexity Algorithm

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High-Speed Low-Complexity Reed-Solomon Decoder using Pipelined Berlekamp-Massey Algorithm and Its Folded Architecture

  • Park, Jeong-In;Lee, Ki-Hoon;Choi, Chang-Seok;Lee, Han-Ho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.3
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    • pp.193-202
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    • 2010
  • This paper presents a high-speed low-complexity pipelined Reed-Solomon (RS) (255,239) decoder using pipelined reformulated inversionless Berlekamp-Massey (pRiBM) algorithm and its folded version (PF-RiBM). Also, this paper offers efficient pipelining and folding technique of the RS decoders. This architecture uses pipelined Galois-Field (GF) multipliers in the syndrome computation block, key equation solver (KES) block, Forney block, Chien search block and error correction block to enhance the clock frequency. A high-speed pipelined RS decoder based on the pRiBM algorithm and its folded version have been designed and implemented with 90-nm CMOS technology in a supply voltage of 1.1 V. The proposed RS(255,239) decoder operates at a clock frequency of 700 MHz using the pRiBM architecture and also operates at a clock frequency of 750 MHz using the PF-RiBM, respectively. The proposed architectures feature high clock frequency and low-complexity.

Iterative Reliability-Based Modified Majority-Logic Decoding for Structured Binary LDPC Codes

  • Chen, Haiqiang;Luo, Lingshan;Sun, Youming;Li, Xiangcheng;Wan, Haibin;Luo, Liping;Qin, Tuanfa
    • Journal of Communications and Networks
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    • v.17 no.4
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    • pp.339-345
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    • 2015
  • In this paper, we present an iterative reliability-based modified majority-logic decoding algorithm for two classes of structured low-density parity-check codes. Different from the conventional modified one-step majority-logic decoding algorithms, we design a turbo-like iterative strategy to recover the performance degradation caused by the simply flipping operation. The main computational loads of the presented algorithm include only binary logic and integer operations, resulting in low decoding complexity. Furthermore, by introducing the iterative set, a very small proportion (less than 6%) of variable nodes are involved in the reliability updating process, which can further reduce the computational complexity. Simulation results show that, combined with the factor correction technique and a well-designed non-uniform quantization scheme, the presented algorithm can achieve a significant performance improvement and a fast decoding speed, even with very small quantization levels (3-4 bits resolution). The presented algorithm provides a candidate for trade-offs between performance and complexity.

Reliability-Based Iterative Proportionality-logic Decoding of LDPC Codes with Adaptive Decision

  • Sun, Youming;Chen, Haiqiang;Li, Xiangcheng;Luo, Lingshan;Qin, Tuanfa
    • Journal of Communications and Networks
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    • v.17 no.3
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    • pp.213-220
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    • 2015
  • In this paper, we present a reliability-based iterative proportionality-logic decoding algorithm for two classes of structured low-density parity-check (LDPC) codes. The main contributions of this paper include: 1) Syndrome messages instead of extrinsic messages are processed and exchanged between variable nodes and check nodes, which can reduce the decoding complexity; 2) a more flexible decision mechanism is developed in which the decision threshold can be self-adjusted during the iterative process. Such decision mechanism is particularly effective for decoding the majority-logic decodable codes; 3) only part of the variable nodes satisfying the pre-designed criterion are involved for the presented algorithm, which is in the proportionality-logic sense and can further reduce the computational complexity. Simulation results show that, when combined with factor correction techniques and appropriate proportionality parameter, the presented algorithm performs well and can achieve fast decoding convergence rate while maintaining relative low decoding complexity, especially for small quantized levels (3-4 bits). The presented algorithm provides a candidate for those application scenarios where the memory load and the energy consumption are extremely constrained.

Reduced Complexity QRD-M Algorithm for Spatial Multiplexing MIMO-OFDM Systems (공간 다중화 MIMO-OFDM 시스템을 위한 복잡도 감소 QRD-M 알고리즘)

  • Mohaisen, Manar;An, Hong-Sun;Chang, Kyung-Hi
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.4C
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    • pp.460-468
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    • 2009
  • Multiple-input multiple-output (MIMO) technology applied with orthogonal frequency division multiplexing (OFDM) is considered as the ultimate solution to increase channel capacity without any additional spectral resources. At the receiver side, the challenge resides in designing low complexity detection algorithms capable of separating independent streams sent simultaneously from different antennas. In this paper, we introduce an upper-lower bounded-complexity QRD-M algorithm (ULBC QRD-M). In the proposed algorithm we solve the problem of high extreme complexity of the conventional sphere decoding by fixing the upper bound complexity to that of the conventional QRD-M. On the other hand, ULBC QRD-M intelligently cancels all unnecessary hypotheses to achieve very low computational requirements. Analyses and simulation results show that the proposed algorithm achieves the performance of conventional QRD-M with only 26% of the required computations.

A Possible Path per Link CBR Algorithm for Interference Avoidance in MPLS Networks

  • Sa-Ngiamsak, Wisitsak;Varakulsiripunth, Ruttikorn
    • 제어로봇시스템학회:학술대회논문집
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    • 2004.08a
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    • pp.772-776
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    • 2004
  • This paper proposes an interference avoidance approach for Constraint-Based Routing (CBR) algorithm in the Multi-Protocol Label Switching (MPLS) network. The MPLS network itself has a capability of integrating among any layer-3 protocols and any layer-2 protocols of the OSI model. It is based on the label switching technology, which is fast and flexible switching technique using pre-defined Label Switching Paths (LSPs). The MPLS network is a solution for the Traffic Engineering(TE), Quality of Service (QoS), Virtual Private Network (VPN), and Constraint-Based Routing (CBR) issues. According to the MPLS CBR, routing performance requirements are capability for on-line routing, high network throughput, high network utilization, high network scalability, fast rerouting performance, low percentage of call-setup request blocking, and low calculation complexity. There are many previously proposed algorithms such as minimum hop (MH) algorithm, widest shortest path (WSP) algorithm, and minimum interference routing algorithm (MIRA). The MIRA algorithm is currently seemed to be the best solution for the MPLS routing problem in case of selecting a path with minimum interference level. It achieves lower call-setup request blocking, lower interference level, higher network utilization and higher network throughput. However, it suffers from routing calculation complexity which makes it difficult to real task implementation. In this paper, there are three objectives for routing algorithm design, which are minimizing interference levels with other source-destination node pairs, minimizing resource usage by selecting a minimum hop path first, and reducing calculation complexity. The proposed CBR algorithm is based on power factor calculation of total amount of possible path per link and the residual bandwidth in the network. A path with high power factor should be considered as minimum interference path and should be selected for path setup. With the proposed algorithm, all of the three objectives are attained and the approach of selection of a high power factor path could minimize interference level among all source-destination node pairs. The approach of selection of a shortest path from many equal power factor paths approach could minimize the usage of network resource. Then the network has higher resource reservation for future call-setup request. Moreover, the calculation of possible path per link (or interference level indicator) is run only whenever the network topology has been changed. Hence, this approach could reduce routing calculation complexity. The simulation results show that the proposed algorithm has good performance over high network utilization, low call-setup blocking percentage and low routing computation complexity.

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Low Complexity Heart Rate Estimation Algorithm for Wearable Device (웨어러블 기기를 위한 낮은 계산량을 갖는 운동 중 심박수 추정 알고리즘)

  • Baek, Hyun Jae;Cho, Jaegeol
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.67 no.5
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    • pp.675-679
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    • 2018
  • A novel heart rate estimation algorithm is presented based on normalized least-mean-square (NLMS) algorithm. This paper presented a three-step processing scheme for estimating heart rate from PPG signal with motion artifacts. The proposed active noise cancellation algorithm has low computational complexity compared to the NLMS algorithm. Experimental results show that the proposed algorithms perform similar with the previous algorithm under motion artifact noises.

An Efficient Adaptive Modulation Scheme for Wireless OFDM Systems

  • Lee, Chang-Wook;Jeon, Gi-Joon
    • ETRI Journal
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    • v.29 no.4
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    • pp.445-451
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    • 2007
  • An adaptive modulation scheme is presented for multiuser orthogonal frequency-division multiplexing systems. The aim of the scheme is to minimize the total transmit power with a constraint on the transmission rate for users, assuming knowledge of the instantaneous channel gains for all users using a combined bit-loading and subcarrier allocation algorithm. The subcarrier allocation algorithm identifies the appropriate assignment of subcarriers to the users, while the bit-loading algorithm determines the number of bits given to each subcarrier. The proposed bit-loading algorithm is derived from the geometric progression of the additional transmission power required by the subcarriers and the arithmetic-geometric means inequality. This algorithm has a simple procedure and low computational complexity. A heuristic approach is also used for the subcarrier allocation algorithm, providing a trade-off between complexity and performance. Numerical results demonstrate that the proposed algorithms provide comparable performance with existing algorithms with low computational cost.

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Low-Complexity Energy Efficient Base Station Cooperation Mechanism in LTE Networks

  • Yu, Peng;Feng, Lei;Li, Zifan;Li, Wenjing;Qiu, Xuesong
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.9 no.10
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    • pp.3921-3944
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    • 2015
  • Currently Energy-Saving (ES) methods in cellular networks could be improved, as compensation method for irregular Base Station (BS) deployment is not effective, most regional ES algorithm is complex, and performance decline caused by ES action is not evaluated well. To resolve above issues, a low-complexity energy efficient BS cooperation mechanism for Long Time Evolution (LTE) networks is proposed. The mechanism firstly models the ES optimization problem with coverage, resource, power and Quality of Service (QoS) constraints. To resolve the problem with low complexity, it is decomposed into two sub-problems: BS Mode Determination (BMD) problem and User Association Optimization (UAO) problem. To resolve BMD, regional dynamic multi-stage algorithms with BS cooperation pair taking account of load and geographic topology is analyzed. And then a distributed heuristic algorithm guaranteeing user QoS is adopted to resolve UAO. The mechanism is simulated under four LTE scenarios. Comparing to other algorithms, results show that the mechanism can obtain better energy efficiency with acceptable coverage, throughput, and QoS performance.

2048-point Low-Complexity Pipelined FFT Processor based on Dynamic Scaling (동적 스케일링에 기반한 낮은 복잡도의 2048 포인트 파이프라인 FFT 프로세서)

  • Kim, Ji-Hoon
    • Journal of IKEEE
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    • v.25 no.4
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    • pp.697-702
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    • 2021
  • Fast Fourier Transform (FFT) is a major signal processing block being widely used. For long-point FFT processing, usually more than 1024 points, its low-complexity implementation becomes very important while retaining high SQNR (Signal-to-Quantization Noise Ratio). In this paper, we present a low-complexity FFT algorithm with a simple dynamic scaling scheme. For the 2048-point pipelined FFT processing, we can reduce the number of general multipliers by half compared to the well-known radix-2 algorithm. Also, the table size for twiddle factors is reduced to 35% and 53% compared to the radix-2 and radix-22 algorithms respectively, while achieving SQNR of more than 55dB without increasing the internal wordlength progressively.

The Region-of-Interest Based Pixel Domain Distributed Video Coding With Low Decoding Complexity (관심 영역 기반의 픽셀 도메인 분산 비디오 부호)

  • Jung, Chun-Sung;Kim, Ung-Hwan;Jun, Dong-San;Park, Hyun-Wook;Ha, Jeong-Seok
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.47 no.4
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    • pp.79-89
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    • 2010
  • Recently, distributed video coding (DVC) has been actively studied for low complexity video encoder. The complexity of the encoder in DVC is much simpler than that of traditional video coding schemes such as H.264/AVC, but the complexity of the decoder in DVC increases. In this paper, we propose the Region-Of-Interest (ROI) based DVC with low decoding complexity. The proposed scheme uses the ROI, the region the motion of objects is quickly moving as the input of the Wyner-Ziv (WZ) encoder instead of the whole WZ frame. In this case, the complexity of encoder and decoder is reduced, and the bite rate decreases. Experimental results show that the proposed scheme obtain 0.95 dB as the maximum PSNR gain in Hall Monitor sequence and 1.87 dB in Salesman sequence. Moreover, the complexity of encoder and decoder in the proposed scheme is significantly reduced by 73.7% and 63.3% over the traditional DVC scheme, respectively. In addition, we employ the layered belief propagation (LBP) algorithm whose decoding convergence speed is 1.73 times faster than belief propagation algorithm as the Low-Density Parity-Check (LDPC) decoder for low decoding complexity.