• Title/Summary/Keyword: Lookup table

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TP2P: Topology-based Peer-to-Peer System for Efficient Resources Lookup (TP2P: 효율적인 자원탐색을 위한 토폴로지 기반의 P2P 시스템)

  • Cha, Bong-Kwan;Han, Dong-Yun;Son, Young-Song;Kim, Kyong-Sok
    • Journal of KIISE:Information Networking
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    • v.34 no.2
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    • pp.88-99
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    • 2007
  • P2P systems are distributed data sharing systems, and each node in them plays the role of client as well as server. There are several studies using Distributed Hash Table, such as Chord, CAN, Tapestry, Pastry, but these systems don't consider the physical latency, therefore they have a weakness of difficulty to guarantee stable performance. To improve this problem, we present the TP2P system. This system is a self-organizing hierarchical overlay system and it uses Chord routing mechanism for lookup data. This system is organized by several subnets, each subnet is organized by physically close nodes, and global network organized by all nodes. In each subnet, one node finds a data, it saves in a node in the subnet, therefore it has higher probability to reduce physical lookup latency than Chord system. And each node has global information of some nodes in its subnet, and it is used to lookup data, therefore the number of hops decrease about 25% as well as the physical lookup latecy are reduced.

Bit-Map Based Hybrid Fast IP Lookup Technique (비트-맵 기반의 혼합형 고속 IP 검색 기법)

  • Oh Seung-Hyun
    • Journal of Korea Multimedia Society
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    • v.9 no.2
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    • pp.244-254
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    • 2006
  • This paper presents an efficient hybrid technique to compact the trie indexing the huge forward table small enough to be stored into cache for speeding up IP lookup. It combines two techniques, an encoding scheme called bit-map and a controlled-prefix expanding scheme to replace slow memory search with few fast-memory accesses and computations. For compaction, the bit-map represents each index and child pointer with one bit respectively. For example, when one node denotes n bits, the bit-map gives a high compression rate by consumes $2^{n-1}$ bits for $2^n$ index and child link pointers branched out of the node. The controlled-prefix expanding scheme determines the number of address bits represented by all root node of each trie's level. At this time, controlled-prefix scheme use a dynamic programming technique to get a smallest trie memory size with given number of trie's level. This paper proposes standard that can choose suitable trie structure depending on memory size of system and the required IP lookup speed presenting optimal memory size and the lookup speed according to trie level number.

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Design of a Radix-8/4/2 variable FFT processor for OFDM systems (OFDM 시스템을 위한 radix-8/4/2 가변 FFT 프로세서의 설계)

  • Kim, Young-Jin;Kim, Hyung-Ho;Lee, Hyon-Soo
    • Journal of Digital Convergence
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    • v.11 no.2
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    • pp.287-297
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    • 2013
  • In this paper, we propose an efficient variable-length radix-8/4/2 FFT architecture for OFDM systems. The FFT processor is based on radix-8 FFT algorithm and also supports radix-4 or radix-2 FFT computation. We are using efficient "In-place" memory access method to maintain conflict-free data access and minimize memory size. Also we replace a very large lookup table with a twiddle factor generator which consumes less area then a ROM-based lookup table. The proposed FFT processor performs variable-length FFT including 64, 256, 512, 1024, 2048, 4096 and 8192 points which cover all the required FFT lengths used in 802.11a, 802.16a, DAB, DVB-T, VDSL and ADSL.

Torque Ripples Minimization of DTC IPMSM Drive for the EV Propulsion System using a Neural Network

  • Singh, Bhim;Jain, Pradeep;Mittal, A.P.;Gupta, J.R.P.
    • Journal of Power Electronics
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    • v.8 no.1
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    • pp.23-34
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    • 2008
  • This paper deals with a Direct Torque Control (DTC) of an Interior Permanent Magnet Synchronous Motor (IPMSM) for the Electric Vehicle (EV) propulsion system using a Neural Network (NN). The Conventional DTC with optimized switching lookup table and three level torque controller generates relatively large torque ripples in an electric vehicle motor drive. For reducing the torque ripples, a three level torque controller is hereby replaced by the five level torque controller. Furthermore, the switching lookup table of the five level torque controller based DTC is replaced with a Neural Network. These DTC schemes of an IPMSM drive are simulated using MATLAB/SIMULINK. The simulated results are compared with the conventional DTC and it is found that the ripples in the torque, as well as in the stator current, are reduced drastically.

A Position Sensorless Control System of SRM using Instantaneous Rotor Position Estimation (순시 회전자 위치 추정을 통한 위치센서 없는 스위치드 릴럭턴스 전동기의 제어시스템)

  • Kim Min-Huei;Baik Won-Sik;Lee Sang-Suk;Park Chan-Gyu
    • Proceedings of the KIPE Conference
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    • 2004.07b
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    • pp.976-980
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    • 2004
  • This paper presents a position sensorless control system of Switched Reluctance Motor (SRM) using neural network. The control of SRM depends on the commutation of the stator phases in synchronism with the rotor position. The position sensing requirement increases the overall cost and complexity. In this paper, the current-flux-rotor position lookup table based position sensorless operation of SRM is presented. Neural network is used to construct the current-flux-rotor position lookup table, and is trained by sufficient experimental data. Experimental results for a 1-hp SRM is presented for the verification of the proposed sensorless algorithm.

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Table Lookup-based Power Estimation for LCD Panels

  • Lee, Jae-Beom;Bang, Sung-Yong;Kim, Nam-Deog;Moon, Seung-Hwan;Lee, Yong-Soon;Chung, Eui-Young
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.689-691
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    • 2008
  • We present a novel power estimation technique for LCD panels. Our method considers the power consumed by each pixel as well as the inter-pixel power effect of the neighboring pixels. We implemented our method based on the table lookup model and its accuracy is about 98% compared to the actual measurements.

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A controller design for high-quality images on microcapsule active-matrix electrophoretic displays

  • Lu, Chi-Ming;Wey, Chin-Long
    • Journal of Information Display
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    • v.13 no.1
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    • pp.21-30
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    • 2012
  • Active-matrix electrophoretic display (AMEPD) is commonly used for the applications of smart handheld reading devices such as e-books and e-news. This paper presents a new reduced waveform lookup table storage method that reduces the associated lookup table by approximately 2n (n is the number of gray levels employed) times the conventional one. The paper also proposes a driving method for image display. The method provides high-speed performance for image display and also effectively eliminates the image residue, achieving high image quality. The prototyped controller was connected to a 6" AMEPD panel, whose excellent display quality demonstrated the effectiveness of the proposed controller design.

FPGA Implementation of Riindael Algorithm according to the Three S-box Implementation Methods (Rijndael S-box의 세 가지 구현 방법에 따른 FPGA 설계)

  • 이윤경;박영수;전성익
    • Proceedings of the IEEK Conference
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    • 2002.06b
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    • pp.281-284
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    • 2002
  • Rijndael algorithm is known to a new private key block cipher which is substitute for DES. Rijndael algorithm is adequate to both hardware and software implementation, so hardware implementation of Rijndael algorithm is applied to high speed data encryption and decryption. This paper describes three implementation methods of Rijndael S-box, which is important factor in performance of Rijndael coprocessor. It shows synthesis results of each S-box implementation in Xilinx FPGA. Tllc lilree S-box implementation methods are implementation using lookup table only, implementation using both lookup table and combinational logic, and implementation using combinational logic only.

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A Study of Algorithm for Digital Technology (디지털 기술의 알고리즘에 관한 연구)

  • Youn, Choong-Mo;Kim, Jae-Jin
    • Journal of Digital Contents Society
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    • v.10 no.4
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    • pp.633-637
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    • 2009
  • In this paper, we present the reuse module library generating algorithm and register-transfer (RT) library generating algorithm considering the power consumption of reuse module for field-programmable gate array (FPGA) technology mapping in order to implement into the circuit for calculating power consumption. To realize the circuit of calculation of power consumption, the FPGA is selected. Considering lookup table (LUT) conditions of selected FPGA, technology mapping process is conducted to minimize the total power consumption. With these information, the circuit is realized using suitable given power consumption among allocated results of modules.

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DESIGN OF DELAY-TOLERANT CONTROLLER FOR REMOTE CONTROL OF NUCLEAR REACTOR POWER

  • Lee, Yoon-Joon;Na, Man-Gyun
    • Nuclear Engineering and Technology
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    • v.41 no.1
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    • pp.71-78
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    • 2009
  • One of main concepts involved in regional small nuclear reactors is unmanned remote control. Internet-based virtual private networks provide environments for the remote monitoring and control of geographically-dispersed systems, and with the advances in communication technologies, the potential of networks for real time control and automation becomes enormous. However, networked control has some problems. The most critical is delay in signal transmission, which degrades system stability and performance. Therefore, a networked control system should be designed to account for delay. This paper proposes some design approaches for a delay-tolerant system that can guarantee predetermined stability margins and performance. To accomplish this, the reactor plant is modeled with consideration of uncertainties. With this model, three kinds of controllers are developed using different methods. The designed systems are compared with respect to stability and performance, and a second-order controller designed using the table lookup method was found to give the most satisfactory results.