• Title/Summary/Keyword: Lock-In

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Vulnerability analysis for AppLock Application (AppLock 정보 은닉 앱에 대한 취약점 분석)

  • Hong, Pyo-gil;Kim, Dohyun
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.32 no.5
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    • pp.845-853
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    • 2022
  • As the memory capacity of smartphone increases, the type and amount of privacy stored in the smartphone is also increasing. but recently there is an increasing possibility that various personal information such as photos and videos of smartphones may be leaked due to malicious apps by malicious attackers or other people such as repair technicians. This paper analyzed and studied the security and vulnerability of these vault apps by analyzing the cryptography algorithm and data protection function. We analyzed 5.3.7(June 13, 2022) and 3.3.2(December 30, 2020) versions of AppLock, the most downloaded information-hidding apps registered with Google Play, and found various vulnerabilities. In the case of access control, there was a vulnerability in that values for encrypting patterns entered by users were hardcoded into plain text in the source code, and encrypted pattern values were stored in xml files. In addition, in the case of the vault function, there was a vulnerability in that the files and log files for storing in the vault were not encrypted.

Internal Defect Position Analysis of a Multi-Layer Chip Using Lock-in Infrared Microscopy (위상잠금 적외선 현미경 관찰법을 이용한 다층구조 칩의 내부결함 위치 분석)

  • Kim, Seon-Jin;Lee, Kye-Sung;Hur, Hwan;Lee, Haksun;Bae, Hyun-Cheol;Choi, Kwang-Seong;Kim, Ghiseok;Kim, Geon-Hee
    • Journal of the Korean Society for Nondestructive Testing
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    • v.35 no.3
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    • pp.200-205
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    • 2015
  • An ultra-precise infrared microscope consisting of a high-resolution infrared objective lens and infrared sensors is utilized successfully to obtain location information on the plane and depth of local heat sources causing defects in a semiconductor device. In this study, multi-layer semiconductor chips are analyzed for the positional information of heat sources by using a lock-in infrared microscope. Optimal conditions such as focal position, integration time, current and lock-in frequency for measuring the accurate depth of the heat sources are studied by lock-in thermography. The location indicated by the results of the depth estimate, according to the change in distance between the infrared objective lens and the specimen is analyzed under these optimal conditions.

Analysis on Quench Recovery Dependence of A Flux-Lock Type SFCL According to the Winding Directions (결선방향에 따른 자속구속형 전류제한기의 퀜치 회복 의존도 해석)

  • Jung, Su-Bok;Cho, Yong-Sun;Choi, Myoung-Ho;Choi, Hyo-Sang
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.1
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    • pp.113-117
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    • 2008
  • We investigated the current limiting and the recovery characteristics of a flux-lock type superconducting fault current limiter(SFCL) according to the winding directions. The flux-lock type SFCL consists of two coils. The primary coil was wound in parallel to the secondary coil through an Iron core, and the secondary coil was connected with the superconducting element in series. We have changed the winding direction of coils to compare the resistive type SFCL with the flux-lock type SFCL. The current limiting and the recovery characteristics were dependent on the winding direction. The quenching time in the additive polarity winding was faster than that of the subtractive polarity winding or the resistivity type. A consumed energy in a superconducting element was represented as $W= VIt=I^2Rt$. We found that there was a difference in the consumed energies in accordance with winding types because of differences in voltages imposed on a superconducting element in accordance with a winding direction.

Fault Current Waveform Analysis of a Flux-Lock Type SFCL According to LC Resonance Condition of Third Winding

  • Lim, Sung-Hun
    • Journal of Electrical Engineering and Technology
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    • v.3 no.2
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    • pp.213-217
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    • 2008
  • The flux-lock type superconducting fault current limiter(SFCL) can apply the magnetic field into the high-$T_C$ superconducting(HTSC) element by adopting the magnetic field coil in its third winding. To apply the magnetic field into the HTSC element effectively, the capacitor for LC resonance is connected in series with the magnetic field coil. However, the current waveform of third winding for the application of the magnetic field is affected by the LC resonance condition for the frequency of the source voltage and can affect the waveform of the limited fault current. In this paper, the current waveform of the third winding in the flux-lock type SFCL according to LC resonance condition during a fault period was analyzed. From the differential equation for its electrical circuit, the current equation of the third winding was derived and described with the natural frequency and the damping ratio as design parameters. Through the analysis according to the design parameters of the third winding, the waveform of the limited fault current was confirmed to be influenced by the current waveform of the third winding and the design condition for the stable fault current limiting operation of this SFCL was obtained.

A Password Method Resistant to Shoulder Surfing Attacks (훔쳐보기 공격에 강인한 비밀번호 방식)

  • Seong, Jin-Taek
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2022.10a
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    • pp.331-332
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    • 2022
  • The previously used locking device is a PIN method and has a problem in that the password is exposed by malicious users. In other words, if attackers looks at lock passwords from the side, correct passwords are known. In this paper, we aim to solve these security problems in lock devices resistant to shoulder surfing attacks. The proposed encryption approach is designed so that attackers cannot know lock passwords. To this end, we use a hidden password method instead of directly entering a PIN-type password to prevent the correct password from being exposed to an attacker even if someone steals the lock password.

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Implementation of an Automatic Door Lock System Using DTMF Signal of a Mobile Phone (모바일 단말기의 DTMF 신호를 이용한 자동 도어락 시스템 구현)

  • Bae Ki-Won;Yang Doo-Yeong
    • The Journal of the Korea Contents Association
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    • v.6 no.1
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    • pp.8-13
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    • 2006
  • In this thesis, an automatic door lock system using a dual tone multiple frequency(DTMF) signal generated as pushing the key button of mobile phone is proposed and implemented. This system consists of a transmitter module and a receiver module for processing the DTMF signal of mobile phone. The DTMF signal of mobile phone connected with ear-phone jack enter into the input terminal of DTMF receiver and those are encoded by a code-converter with 4-bits binary format in the DTMF receiver. The encoded output signals are transmitted to the amplitude shift keying(ASK) modulator of transmitter module and the modulated ASK signals which are converted into radio frequency(RF) signals propagate in a free space. The RF signals passed through a free space are demodulated by the ASK demodulator of receiver module and the demodulated ASK signals are sent to a micro-controller unit(MCU). The output signals processed by the MCU are compared with the secreted identification number which is prerecorded in a microprocessor and are transferred to a power relay. If the result is the same, the automatic door lock system opens a door. In the opposite case, it maintains closing the door. The implemented automatic door lock system operates well in mobile environments.

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Shearing Phase Lock-in Infrared Thermography for Defects Evaluation of Metallic Materials Specimen (금속재료 시편의 결함평가에 대한 전단위상 Lock-in 적외선열화상 연구)

  • Park, Jeong-Hak;Choi, Man-Yong;Kim, Won-Tae
    • Journal of the Korean Society for Nondestructive Testing
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    • v.30 no.2
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    • pp.91-97
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    • 2010
  • This paper proposes method to evaluate the location and size of the internal defects of metallic specimens by the shearing phase lock-in infrared thermography. Until now, infrared thermography test for metal specimen of STS304 and Cu-Zn were conducted to find the best test conditions. However, In unspecified situation of the form and existence of defects, there was a disadvantage to takes a long time for finding the optimal experimental conditions. The defect detection and evaluation was performed at 60 MHz signal using lock-in and shearing-phase method under limited heating conditions. By shearing-phase distribution method, Defects for the maximum, minimum and zero points were quantitatively detected at the size and location of the subsurface. As results, application of the proposed technique was verified for STS304 and Cu7-Zn3 with artificial defect and factors affected defect evaluation were searched and analyzed.

A Fast Locking Dual-Loop PLL with Adaptive Bandwidth Scheme (루프 대역폭 조절기를 이용한 빠른 위상 고정 시간을 갖는 이중 루프 위상고정루프)

  • Song, Youn-Gui;Choi, Young-Shig
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.5
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    • pp.65-70
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    • 2008
  • A novel fast locking dual-loop integer-N phase locked loop(PLL) with adaptive bandwidth scheme is presented. When the PLL is out-of-lock, bandwidth becomes much wider than 1/10 of channel spacing with the wide bandwidth loop. When the PLL is near in-lock, bandwidth becomes narrower than 1/10 of channel spacing with the narrow bandwidth loop. The proposed PLL is designed based on a $0.35{\mu}m$ CMOS process with a 3.3V supply voltage. Simulation results show the fast look time of $50{\mu}s$ for an 80MHz frequency jump in a 200KHz channel spacing PLL with almost 14 times wider bandwidth than the channel spacing.

Code Tracking Scheme for Cosine Phased BOC Signals Based on Combination of Sub-correlations (부상관함수 결합에 기반한 Cosine 위상 BOC 코드 추적 기법)

  • Lee, Young-Po;Kim, Hyun-Soo;Yoon, Seok-Ho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.9C
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    • pp.581-588
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    • 2011
  • In this paper, we propose a novel unambiguous code tracking scheme for cosine phased binary offset carrier (BOC) signals. We first obtain the sub-correlation functions composing the BOC autocorrelation function, and then, re-combine the sub-correlation functions generating a correlation function with no side-peak. Finally, by using the correlation function with no side-peak in the delay lock loop, the proposed scheme performs unambiguous signal tracking. Numerical results demonstrate that the proposed scheme provides a performance improvement over the conventional unambiguous scheme in terms of the tracking error standard deviation (TESD).

A Digital DLL with 4-Cycle Lock Time and 1/4 NAND-Delay Accuracy

  • Kim, Sung-Yong;Jin, Xuefan;Chun, Jung-Hoon;Kwon, Kee-Won
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.4
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    • pp.387-394
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    • 2016
  • This paper presents a fully digital delay locked loop (DLL) that can acquire lock in four clock cycles with a resolution of a 1/4 NAND-delay. The proposed DLL with a multi-dither-free phase detector acquires the initial lock in four clock cycles with 1/2 NAND-delay. Then, it utilizes a multi-dither-free phase detector, a region accumulator, and phase blenders, to improve the resolution to a 1/4 NAND-delay. The region accumulator which continuously steers the control registers and the phase blender, adaptively controls the tracking bandwidth depending on the amount of jitter, and effectively suppresses the dithering jitter. Fabricated in a 65 nm CMOS process, the proposed DLL occupies $0.0432mm^2$, and consumes 3.7 mW from a 1.2-V supply at 2 GHz.