• 한국문헌정보학회지
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• 제17권
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• pp.11-47
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• 1989

This study intends to examine the background and the procedure of the carving of the tablets of the second edition of Dae-Jang-Mock­Lock(재조대장목록). the time and the route of the moving of the tablets. into Haein-sa, and the contents and the system of it. This study is mainly based on the second edition of Dae-Jang-Mock-Lock. But the other closely related materials such as restored first. edition of the Dae- Jang-Mock-Lock, Koryo Sin-Jo-Dae-Jang-Byeol-Lock (고려신조대장교정별록). Kae-Won-Seok-Kyo-Lock (개원석교록). Sok-Kae­Won-Seok-Kyo-Lock (속개원석교록). Jeong-Won-Sin-Jeong-Seok-Kyo­Lock(정원신정석교록), Sok-Jeong-Won-Seok-Kyo-Lock(속정원석교록), Dea-Jung-Sang-Bu-Beob-Bo-Lock(대중상부법보록), and Kyeong-Woo-Sin-Su-Beob-Bo-Lock(경우신수법보록), are also analysed and closely examined. The results of this study can be summarized as follows: 1. The second edition of Tripitaka Koreana(고려대장경) was carved for the purpose of defending the country from Mongolia with the power of Buddhism, after the tablets of the first edition in Buin-sa(부이사) was destroyed by fire. 2. In 1236. Dae-Jang-Do-Gam(대장도감) was established, and the preparation for the recarving of the tablets such as comparison between the content, of the first edition of Tripitalk Koreana, Gal-Bo-Chik-Pan-Dae­Jang-Kyeong and Kitan Dae- Jang-Kyeong, transcription of the original copy and the preparation of the wood, etc. was started. 3. In 1237 after the announcement of Dae-Jang-Gyeong-Gak-Pan-Gun­Sin-Gi-Go-Mun(대장경핵판군신석고문), the carving was started on a full scale. And seven years later (1243), Bun-Sa-Dae-Jang-Do-Gam(분사대장도감) was established in the area of the South to expand and hasten the work. And a large number of the tablets were carved in there. 4. It took 16 years to carve the main text and the supplements of the second edition of Tripitaka Koreana, the main text being carved from 1237 to 1248 and the supplement from 1244 to 1251. 5. It can be supposed that the tablets of the second edition of Tripitaka Koreana, stored in Seon-Won-Sa(선원사), Kang-Wha(강화), for about 140 years, was moved to Ji-Cheon-Sa(지천사), Yong-San(용산), and to Hae-In-Sa(해인사) again, through the west and the south sea and Jang-Gyeong-Po(장경포), Go-Ryeong(고령), in the autumn of the same year. 6. The second edition of Tripitaka Koreana was carved mainly based on the first edition, comparing with Gae-Bo-Chik-Pan-Dae-Jang-Kyeong(개보판대장경) and Kitan Dae-Jang-Kyeong(계단대장경). And the second edition of Dae-Jang-Mock-Lock also compiled mainly based on the first edition with the reference to Kae-Won-Seok-Kyo-Lock and Sok-Jeong-Won-Seok-Kyo-Lock. 7. Comparing with the first edition of Dae-Jang-Mock-Lock, in the second edition 7 items of 9 volumes of Kitan text such as Weol-Deung­Sam-Mae-Gyeong-Ron(월증삼매경론) are added and 3 items of 60 volumes such as Dae-Jong-Ji-Hyeon-Mun-Ron(대종지현문논) are substituted into others from Cheon chest(천함) to Kaeng chest(경함), and 92 items of 601 volumes such as Beob-Won-Ju-Rim-Jeon(법원주임전) are added after Kaeng chest. And 4 items of 50 volumes such as Yuk-Ja-Sin-Ju-Wang-Kyeong(육자신주왕경) are ommitted in the second edition. 8. Comparing with Kae-Won-Seok-Kyo-Lock, Cheon chest to Young chest (영함) of the second edition is compiled according to Ib-Jang-Lock(입장록) of Kae-Won-Seok-Kyo-Lock. But 15 items of 43 vol­umes such as Bul-Seol-Ban-Ju-Sam-Mae-Kyeong(불설반주삼매경) are ;added and 7 items of 35 volumes such as Dae-Bang-Deung-Dae-Jib-Il­Jang-Kyeong(대방등대집일장경) are ommitted. 9. Comparing with Sok-Jeong-Won-Seok-Kyo-Lock, 3 items of the 47 volumes (or 49 volumes) are ommitted and 4 items of 96 volumes are ;added in Caek chest(책함) to Mil chest(밀함) of the second edition. But the items are arranged in the same order. 10. Comparing with Dae- Jung-Sang-Bo-Beob-Bo-Lock, the arrangement of the second edition is entirely different from it. But 170 items of 329 volumes are also included in Doo chest(두함) to Kyeong chest(경함) of the second edition, and 53 items of 125 volumes in Jun chest(존함) to Jeong chest(정함). And 10 items of 108 volumes in the last part of Dae-Jung-Sang-Bo-Beob-Bo-Lock are ommitted and 3 items of 131 volumes such as Beob-Won-Ju-Rim-Jeon(법원주임전) are added in the second edition. 11. Comparing with Kyeong-Woo-Sin-Su-Beob-Bo-Lock, all of the items (21 items of 161 volumes) are included in the second edition without ;any classificatory system. And 22 items of 172 volumes in the Seong­Hyeon-Jib-Jeon(성현집전) part such as Myo-Gak-Bi-Cheon(묘각비전) are ommitted. 12. The last part of the second edition, Joo chest(주함) to Dong chest (동함), includes 14 items of 237 volumes. But these items cannot be found in any other former Buddhist catalog. So it might be supposed as the Kitan texts. 13. Besides including almost all items in Kae-Won-Seok-Kyo-Lock and all items in Sok-Jeong-Won-Seok-Kyo-Lock, Dae-Jung-Sang-Bo­Beob-Bo-Lock, and Kyeong-Woo-Sin-Su-Beob-Bo-Lock, the second edition of Dae-Jang-Mock-Lock includes more items, at least 20 items of about 300 volumes of Kitan Tripitaka and 15 items of 43 volumes of traditional Korean Tripitake that cannot be found any others. Therefore, Tripitaka Koreana can be said as a comprehensive Tripitaka covering all items of Tripitakas translated in Chinese character.

• 조명전기설비학회논문지
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• 제21권8호
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• pp.107-112
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• 2007

자속구속형 초전도 한류기는 1차 권선과 초전도 소자가 직렬로 연결된 2차 권선을 갖는 변압기로 구성되어 있다. 이 초전도 한류기는 결선방향에 따라 감.가극 결선으로 나누어진다. 1차 권선과 2차 권선의 인덕턴스 비에 따라 자속구속형 초전도 한류기는 사고전류의 제한특성을 제어할 수 있다. 본 논문에서는 인가전압에 따른 자속구속형 초전도 한류기의 전압 전류 특성을 분석하였다. 감 가극 결선된 자속구속형 초전도 한류기의 인가전압을 증가시켰을 때, 초기에 제한되는 전류 및 초전도 소자의 ??치 시간은 증가하였다. 초전도 소자의 회복시간은 인가전압이 증가함에 따라 증가하였다. 그러므로 자속구속형 초전도 한류기의 회복특성은 초전도 소자의 소비전력이 증가하기 때문에 초전도 소자에서 소비되는 에너지에 크게 의존한다는 것을 확인할 수 있었다.

• 전기학회논문지
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• 제66권7호
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• pp.1141-1148
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• 2017

Generally, a thermistor made by sintering a metal oxide is widely used to measure the ambient temperature. This thermistor is widely used not only for industrial use but also for medical use because of its excellent sensitivity, durability, temperature change characteristics and low cost. In particular, the normal body temperature is 36.9 degrees relative to the armpit temperature, and it is most closely related to the circulating blood flow. Previous studies have shown that body temperature changes during biomechanical changes and body temperature changes by anomalous signs or illnesses. Therefore, in this study, we propose a Lock-In-Amp design to detect minute temperature changes of clothing and thermistor wired by a preacher as a method to regularly measure body temperature in daily life. Especially, it is designed to measure the minute resistance change of the thermistor according to body temperature change even in a low-cost microprocessor environment by using a micro-processor-based Lock-In-Amp, and a jacquard and the thermistor is arranged so as to be close to the side, so that the reference body temperature can be easily measured. The temperature was measured and stored in real time using short-range wireless communication for non - restraint temperature monitoring. A baby vest was made to verify its performance through temperature experiments for infants. The measurement of infant body temperature through the existing skin sensor or thermometer has limitations in monitoring infant body temperature for a long time without restriction. However, it can be overcome by using the embroidery fabric based micro temperature monitoring wireless monitoring device proposed in this study.

• 대한전기학회논문지:시스템및제어부문D
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• 제50권10호
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• pp.479-485
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• 2001

In this paper, we introduce a charge pump phase-locked loop (PLL) architecture which employs a precharge phase frequency detector (PFD) and a sequential PFD to achieve a high frequency operation and a fast acquisition. Operation frequency is increased by using the precharge PFD when the phase difference is within $-{\pi}{\sim}{\pi}$ and acquisition time is shortened by using the sequential PFD and the increased charge pump current when the phase difference is larger than ${\pm}{\pi}$. So error detection range of the proposed PLL structure is not limited to $-{\pi}{\sim}{\pi}$ and a high frequency operation and a higher speed lock-up time can be achieved. The proposed PLL was designed using 1.5 ${\mu}m$ CMOS technology with 5V supply voltage to verify the lock in process. The proposed PLL shows successful acquisition for 200 MHz input frequency. On the other hand, the conventional PLL with the sequential PFD cannot operate at up to 160MHz. Moreover, the lock-up time is drastically reduced from 7.0 ${\mu}s\;to\;2.0\;{\mu}s$ only if the loop bandwidth to input frequency ratio is regulated by the divide-by-4 counter during the acquisition process. By virtue of this dual PFDs, the proposed PLL structure can improve the trade-off between acquisition behavior and locked behavior.

• 한국항공우주학회지
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• 제47권5호
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• pp.358-363
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• 2019

무인 항공기에 탑재된 EOIR 장비가 데이터 링크를 통해 영상과 데이터를 송수신할 경우 데이터의 전송 경로와 지상 장비 및 무선 네트워크 상태에 따라 데이터 전송이 지연될 수 있다. 이로 인해 수신한 영상을 보는 시간과 촬영하는 시간이 다르기 때문에 초기 표적의 LOCK-ON 실패 가능성이 높아진다. 따라서 본 논문은 영상과 동기화된 프레임 인덱스를 도입하고, 지상에서 명령에 프레임 인덱스를 추가하여 전송함으로써 영상추적의 성공률을 높이는 방법을 제안하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 추계학술대회 논문집 전기설비전문위원
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• pp.93-96
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• 2004

In this paper, we analyzed the current limiting characteristics according to increase of source voltage in the flux-lock type high-Tc superconducting fault current limiter (SFCL). The flux-lock type SFCL consisted of two coils, which were wound in parallel each other through an iron core, and high-Tc superconducting (HTSC) element connected with coil 2 in series. The flux-lock type SFCL has the characteristics better in comparison with the resistive type SFCL because the fault current in the flux-lock type SFCL can be divided into two coils by the inductance ratio of coil 1 and coil 2. The fault current limiting operation of the flux-lock type SFCL can be different due to winding direction of the two coils. The winding method where the decrease of linkage flux between two coils in the accident happens is called the subtractive polarity winding and the winding method in case of the increase of linkage flux is called the additive polarity winding. The fault current limiting experiments according to the source voltage were performed for these two winding methods. Through the comparison and the analysis of the experimental data, we confirmed that the quench time was shorter, irrespective of the winding direction as the source voltage increased and that the fault current and the HTSC's resistance increased as the amplitude of the source voltage increased. The additive polarity winding made the fast quench time and the lower resistance of HTSC element in comparison with the subtractive polarity winding. The fault current of the subtractive polarity winding was larger than that of the additive polarity winding. In conclusion, we found that the additive polarity winding reduced the burden of SFCL because the quench time was shorter and the fault current was smaller than those of the subtractive polarity winding.

• 한국정보과학회논문지:데이타베이스
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• 제29권6호
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• pp.464-476
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• 2002

모든 데이타를 주기억장치에 상주시키는 주기억장치 데이타베이스 시스템은 고성능 실시간 트랜잭션 처리에 적합하다. 주기억장치 데이타베이스 시스템에서 트랜잭션이 데이타베이스에 접근하는 시간이 매우 짧기 때문에 동시성 제어를 위해 이단계 로킹 기법을 사용할 경우, 로크 충돌이 일어날 확률이 적은 반면에, 데이타 객체를 접근할 때마다 수행해야 하는 로킹 연산의 부하는 트랜잭션 수행시간에 비해 상대적으로 큰 비중을 차지하게 된다. 본 논문에서는 로킹 연산의 부하를 최소화하면서 트랜잭션의 우선 순위를 반영한 실시간 정적 로킹 기법을 설계하고, 이를 주기억장치 실시간 데이타베이스 시스템인 Mr.RT에서 구현하였다. 또한 이단계 로킹 기법을 기반으로 하는 기존의 실시간 동시성 제어 기법들(2PL-PI, 2PL-HP)과의 성능 비교를 통하여 실시간 정적 로킹 기법이 보다 좋은 성능을 보임을 확인하였다.

• 정보처리학회논문지A
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• 제10A권3호
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• pp.247-254
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• 2003

본 연구에서 고속 데이터 전송을 위해 Double Data Rate(DDR) 방식을 사용하는 SDRAM에 내장할 수 있는 저전압 광대역 Delay Locked Loop(DLL) 회로를 설계하였다. 고해상도와 빠른 Lock-on 시간을 위하여 새로운 유형의 위상검출기론 설계하였고 카운터 및 Indicator 등 내장회로의 빠른 동작을 위해 Dual-Data Dual-Clock 플립플롭(DCDD FF)에 기반을 둔 설계를 수행하였으며 이 FF을 사용하므로서 소자수를 70% 정도 감소시킬 수 있었다. Delay Line 중에서 Coarse 부분은 0.2ns 이하까지 검출 가능하며 위상오차를 더욱 감소시키고 빠른 Lock-on 기간을 얻기 위해 Fine 부분에 3-step Vernier Line을 설계하였다. 이 방식을 사용한 본 DLL의 위상오차는 매우 적고 25ps 정도이다. 본 DLL의 Locking 범위는 50∼500MHz로 넓으며 5 클럭 이내의 빠른 Locking을 얻을 수 있다. 0.25um CMOS 공정에서 1.8V 공급전압 사용시 소비전류는 500MHZ 주파수에서 32mA이다. 본 DLL은 고주파 통신 시스템의 동기화와 같은 다른 응용면에도 이용할 수 있다.

• ETRI Journal
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• 제29권6호
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• pp.716-724
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• 2007

As ultra-wideband impulse radio (UWB-IR) uses short-duration impulse signals of nanoseconds, even a small number of timing errors can cause a detrimental effect on system performance. A delay-locked loop (DLL) is proposed to synchronize and reduce timing errors. The design of the DLL is vital for UWB systems. In this paper, an improved DLL is introduced to a UWB-IR time-hopping spread-spectrum system. Instead of using only two central correlator branches as in a conventional DLL, the proposed system uses two additional correlator branches with different delay parameters and different weight parameters. The performance of the proposed schemes with the optimal parameters is compared with that of traditional schemes through simulation: the proposed four-branch DLLs achieves less tracking jitter or a longer mean time to lose lock (MTLL) than the conventional two-branch DLLs if proper parameters are chosen.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2017년도 춘계학술대회
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• pp.691-693
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• 2017

본 논문에서는 시간 차 감지기와 LSI(Lock Status Indicator)를 사용하여 빠른 위상고정 시간을 갖는 위상고정루프를 제안하였다. 제안된 위상고정루프는 1.8V $0.18{\mu}m$ CMOS 공정을 사용하여 설계하였고, Hspice 시뮬레이션을 통해 회로의 동작을 검증하였다.다음은 요약문입니다.