• Title/Summary/Keyword: Linearity Improvement Technique

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Ram Accelerator Optimization Using the Response Surface Method (반응면 기법을 이용한 램 가속기 최적설계에 관한 연구)

  • Jeon Yong-Hee;Jeon Kwon-Su;Lee Jae-Woo;Byun Yung-Hwan
    • 한국전산유체공학회:학술대회논문집
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    • 2000.05a
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    • pp.159-165
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    • 2000
  • In this paper, numerical study has been done for the improvement of the superdetonative ram accelerator performance and for the design optimization of the system. The objective function to optimize the premixture composition is the ram tube length required to accelerate projectile from initial velocity $V_o$ to target velocity $V_e$. The premixture is composed of $H_2,\;O_2,\;N_2$ and the mole numbers of these species are selected at design variables. RSM(Response Surface Methodology) which is widely used for the complex optimization problems is selected as the optimization technique. In particular, to improve the non-linearity of the response and to consider the accuracy and efficiency of the solution, design space stretching technique has been applied. Separate sub-optimization routine is introduced to determine the stretching position and clustering parameters which construct the optimum regression model. Two step optimization technique has been applied to obtain the optimal system. With the application of stretching technique, we can perform system optimization with a small number of experimental points, and construct precise regression model for highly non-linear domain. The error to compared with analysis result is only $0.01\%$ and it is demonstrated that present method can be applied more practical design optimization problems with many design variables.

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Ram Accelerator Optimization Using the Response Surface Method (반응면 기법을 이용한 램 가속기 최적설계에 관한 연구)

  • Jeon Kwon-Su;Jeon Yong-Hee;Lee Jae-Woo;Byun Yung-Hwan
    • Journal of computational fluids engineering
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    • v.5 no.2
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    • pp.55-63
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    • 2000
  • In this paper, the numerical study has been done for the improvement of the superdetonative ram accelerator performance and for the design optimization of the system. The objective function to optimize the premixture composition is the ram tube length, required to accelerate projectile from initial velocity V/sub 0/ to target velocity V/sub e/. The premixture is composed of H₂, O₂, N₂ and the mole numbers of these species are selected as design variables. RSM(Response Surface Methodology) which is widely used for the complex optimization problems is selected as the optimization technique. In particular, to improve the non-linearity of the response and to consider the accuracy and the efficiency of the solution, design space stretching technique has been applied. Separate sub-optimization routine is introduced to determine the stretching position and clustering parameters which construct the optimum regression model. Two step optimization technique has been applied to obtain the optimal system. With the application of stretching technique, we can perform system optimization with a small number of experimental points, and construct precise regression model for highly non-linear domain. The error compared with analysis result is only 0.01% and it is demonstrated that present method can be applied to more practical design optimization problems with many design variables.

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Narrow-Band Analog Pre-Distortion Linearization Technique using UHF 400 MHz Band 20 W Power Amplifier (UHF 400 MHz 대역 20 W급 전력증폭기를 이용한 협대역 아날로그 전치왜곡 선형화 기법)

  • Ha, Jung-wan;Kim, Kang-san;Kim, Hyo-Jong
    • Journal of Advanced Navigation Technology
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    • v.23 no.2
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    • pp.179-185
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    • 2019
  • In this paper, we have studied narrow-band analog pre-distortion linearization technique using UHF 400 MHz band 20 W power amplifier. The analog pre-distorter used the SC1894 radio frequency power amplifier linearizer(RFPAL) provided by MAXIM Corp and through the look-up table technique confirmed the intermodulation distortion(IMD) performance and the adjusted channel leakage ratio(ACLR) improvement for bandwidth below 1 MHz which does not operate on existing chips. In the 400 MHz (400 ~ 500 MHz) band, IMD performance and the ACLR improvement of up to 17.46 dB based on 1-channel offset and up to 16.6 dB based on 2-channel offset were confirmed. In the system requiring the same linearity, we confirmed power efficiency improvement of 12.41% at output power of over 40 W.

Envelope Elimination and Restoration Transmitter for Efficiency and Linearity Improvement of Power Amplifier (전력증폭기의 효율 및 선형성 개선을 위한 포락선 제거 및 복원 송신기)

  • Cho, Young-Kyun;Kim, Changwan;Park, Bong Hyuk
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.3
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    • pp.292-299
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    • 2015
  • An envelope elimination and restoration transmitter that uses a tri-level envelope encoding scheme is presented for improving the efficiency and linearity of the system. The proposed structure amplifies the same magnitude signal regardless of the input peak-to-average power ratio and reduces the quantization noise by spreading out the noise to the out-of-band frequency, resulting in the enhancement of power efficiency. An improved linearity is also obtained by providing a new timing mismatch calibration technique between the envelope and phase signal. Implementation in a 130 nm CMOS process, transmitter measurements on a 20-MHz long-term evolution input signal show an error vector magnitude of 3.7 % and an adjacent channel leakage ratio of 37.5 dBc at 2.13 GHz carrier frequency.

Linearity Improvement of Doherty Amplifier Using Analog Predistorter with Phase-Controlled Error Generator (위상조절 왜곡발생기를 가진 아날로그 전치왜곡기를 이용한 Doherty Amplifier의 선형성 개선)

  • Lee, Yong-Sub;Jeong, Yoon-Ha
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.44 no.2 s.314
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    • pp.32-38
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    • 2007
  • This paper represents a Doherty amplifier (DPA) with analog predistorter (PD) to improve the linearity of the DPA while preserving the high efficiency. A third-order PD cancels fifth-order intermodulation (IM5) as well as third-order intermodulation (IM3) components by their same phase difference in the PD and DPA. This is accomplished by independently controlling their phase by using the phase-controlled error generator in the PD. Also, we confirm the phase-control ability of the error generator experimentally with a simple and accurate phase measurement setup. For experimental verification, a third-order PD has been implemented and tested in a 180-W DPA at the wide-band code division multiple access (WCDMA) band of 2.11-2.17 GHz. Two-tone test results show that significant cancellation of IM3 and IM5 components can be obtained. For four-carrier WCDMA applications, significant adjacent channel leakage ratio (ACLR) improvement is achieved over a wide range of output power levels. This technique is cost-effective and convenient due to its simple structure, compact size, and three control parameters.

Effect of DP Finishing Conditions on the Mechanical Properties and Hand of Cotton Fabrics (DP 가공조건이 면직물의 역학적 성질과 태에 미치는 영향)

  • 신윤숙
    • Journal of the Korean Society of Clothing and Textiles
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    • v.24 no.3
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    • pp.440-447
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    • 2000
  • The effects of DP finishing conditions including process technique and finishing agent on the mechanical properties and hand of cotton fabrics were investigated. 100% cotton fabrics were treated with NMA/DMDHEU and NMA/YF using wet-fixation and steam-fixation process. For comparison, conventional pad-dry-cure process was used with DMDHEU. After DP finishing, tensile and compressional resilience increased and bending hysteresis decreased, resulting in the improvement of dimensional stability of cotton fabric. WF and SF process rendered fabrics better shear properties, tensile energy, and compressional linearity and energy than PDC process. However, SF process produced fabrics with higher geometrical roughness than WF process. After DP finishing, primary hand values except Koshi increased, resulting in the increase of total hand value of cotton fabric.

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A Novel Harmonic Compensation Technique for the Grid-Connected Inverters (계통연계 인버터를 위한 새로운 고조파 보상법)

  • Ashraf, Muhammad Noman;Khan, Reyyan Ahmad;Choi, Woojin
    • Proceedings of the KIPE Conference
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    • 2019.07a
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    • pp.71-73
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    • 2019
  • The output current of the Grid Connected Inverter (GCI) can be polluted with harmonics mainly due to i) dead time in switches, ii) non-linearity of switches, iii) grid harmonics, and iv) DC link fluctuation. Therefore, it is essential to design the robust Harmonic Compensation (HC) technique for the improvement of output current quality and fulfill the IEEE 1547 Total harmonics Distortion (THD) limit i.e. <5%. The conventional harmonic techniques often are complex in implementation due to their i) additional hardware needs, ii) complex structure, iii) difficulty in tuning of parameters, iv) current controller compatibility issues, and v) higher computational burden. In this paper, to eliminate the harmonics from the GCI output current, a novel Digital Lock-In Amplifier (DLA) based harmonic detection is proposed. The advantage of DLA is that it extracts the harmonic information accurately, which is further compensated by means of PI controller in feed forward manner. Moreover, the proposed HC method does not require additional hardware and it works with any current controller reference frame. To show the effectiveness of the proposed HC method a 5kW GCI prototype built in laboratory. The output current THD is achieved less than 5% even with 10% load, which is verified by simulation and experiment.

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Linearity Improvement of Class E Amplifier Using Digital Predistortion (디지털 사전왜곡을 이용한 마이크로파 E급 증폭기의 선형성 개선)

  • Park, Chan-Hyuck;Koo, Kyung-Heon
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.3 s.357
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    • pp.92-97
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    • 2007
  • Switching mode amplifiers have been studied widely for use at microwave frequency range, and the class E amplifier which is a type of switching mode amplifier offers very high efficiency approaching 100%. In this paper, 2.4GHz microwave class E amplifier with 66% power added efficiency (PAE) and 17.6dBm output has been linearized for use at wireless LAN transmitter, and digital predistortion technique with look up table is applied. With -3dBm input power of wireless LAN, measured output spectrum can meet the required IEEE 802.11g standard spectrum mask, and the digital predistortion output spectrum has been improved by 5dB of ACPR at 20MHz offset from center frequency.

PAPR Reduction Technique and BER Performance Improvement in OFDM-based Wireless Visible Light Communication (OFDM을 사용하는 무선 가시 광통신에서의 PAPR 저감 기법과 BER성능 개선)

  • Ryu, Sang-Burm;Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.3A
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    • pp.189-197
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    • 2011
  • OFDM systems are much studied for the recent high speed wireless optical communication system. OFDM system has basically high PAPR and ICI easily generated because of non-linearity and RF impairments. In the wireless optical communication system, optical output power driven by current of LED is not linear so that transmission signals are distorted. Therefore, research about reception performance of this nonlinear optical output emitted by non-linear LED transfer function and OFDM signal has been conducted. Nonlinear effect of LED is different from nonlinear effect of OFDM system in the conventional radio communication system, which degrades the BER performance. In this paper, we apply non-linear transfer function of recently studied LED into OFDM system. So, for reducing the PAPR and suppressing the ICI in frequency domain of receiver, we suggest a new PAPR reduction technique to reduce non-linear distortion of LED and an adaptive ICI suppression algorithm so that BER performance may be improved. Also, the proposed method is verified through simulation results.

A Design of Wideband Frequency Synthesizer for Mobile-DTV Applications (Mobile-DTV 응용을 위한 광대역 주파수 합성기의 설계)

  • Moon, Je-Cheol;Moon, Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.5
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    • pp.40-49
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    • 2008
  • A Frequency synthesizer for mobile-DTV applications is implemented using $0.18{\mu}m$ CMOS process with 1.8V supply. PMOS transistors are chosen for VCO core to reduce phase noise. The measurement result of VCO frequency range is 800MHz-1.67GHz using switchable inductors, capacitors and varactors. We use varactor bias technique for the improvement of VCO gain linearity, and the number of varactor biasing are minimized as two. VCO gain deterioration is also improved by using the varactor switching technique. The VCO gain and interval of VCO gain are maintained as low and improved using the VCO frequency calibration block. The sigma-delta modulator for fractional divider is designed by the co-simualtion method for accuracy and efficiency improvement. The VCO, PFD, CP and LF are verified by Cadence Spectre, and the sigma-delta modulator is simulated using Matlab Simulink, ModelSim and HSPICE. The power consumption of the frequency synthesizer is 18mW, and the VCO has 52.1% tuning range according to the VCO maximum output frequency. The VCO phase noise is lower than -100dBc/Hz at 1MHz at 1MHz offset for 1GHz, 1.5GHz, and 2GHz output frequencies.