• Title/Summary/Keyword: Linear gate-amp

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New Switching Pattern for the Paralleling of SRM Low Voltage Inverter (저전압형 SRM 인버터의 병렬운전 위한 새로운 스위칭)

  • 이상훈;박성준;원태현;안진우;이만형
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.53 no.6
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    • pp.359-367
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    • 2004
  • The switched reluctance motor(SRM) has considerable potential for industrial applications because of its high result lily as a result of the absence of rotor windings. In some applications with SRM, paralleling strategy is often used for cost saving, increasing of current capacity and system reliability. A SRM inverter has very low ,switching frequency. This results in reducing the burden for a high-speed of the gate-amp interface circuit. and the linearity of optocoupler is used to protect the instantaneous peak current for the stable operation. In this paper, series resistor is used to equal the current sharing of each switching device and a linear gate-amp is proposed to protect the instantaneous peak current which occurs in transient state. The proposed paralleling strategy is verified by experimental results.

Novel Switching Pattern for the Paralleling of SRM Inverter (SRM 인버터의 병렬 스위칭을 위한 새로운 스위칭 패턴)

  • Lee S. H.;Lee S. H.;Jung S. W.;Lim H. H.;Park S. J.;Ahn J. W.
    • Proceedings of the KIPE Conference
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    • 2002.07a
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    • pp.313-316
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    • 2002
  • A SRM inverter has very low switching frequency. This results in reducing the burden for a high-speed of the gate-amp interface circuit. and the linearity of optocoupler is used to protect the intanteneous peak current for the stable operation In this paper, series resistor is used to equal the current sharing of each switching device and a linear gate-amp is proposed to protect the intanteneous peak current which occurs in transient state.

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Design, Linear and Efficient Analysis of Doherty Power Amplifier for IMT-2000 Base Station (IMT-2000 기지국용 도허티 전력증폭기의 설계 및 선형성과 효율 분석)

  • Kim Seon-Keun;Kim Ki-Moon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.2
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    • pp.262-267
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    • 2005
  • During several method of improvement efficient, We analyzed Doherty Amplifier That used by simple circuit and 180w PEP LDMOS to analyze improvement of efficient and linearity. We for testing performance of Doherty Amplifier compared with Balanced Class AB, the experimental results show when Peaking Amp $V_gs.P$=1.53V, the efficiency is increased at Maximum 11.6$\%$. After finding optimum bias point of linearity improvement by manual tuning gate bias, when WCDMA 4FA $V_gs.P$=3.68V IMSR could be increased maximum 3.34dB. especially, when we match bias point of Peaking amp at 1.53V, we could get a excellent efficiency increase and have fUR under -3203c at output power 43dBm.