• Proceedings of the KIEE Conference
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• 1997.11a
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• pp.109-112
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• 1997

A Discrete Event Dynamic System is a system whose states change in response to the occurrence of events from a predefined event set. A major difficulty in developing analytical results for the systems is the lack of appropriate modeling techniques. This paper proposes the use of Real-time Temporal Logic as a modeling tool for the modeling and control of fixed-time traffic control problem which by way of a DEDS. The Real-time Temporal Logic Frameworks is extended with a suitable structure of modeling hard real-time constraints. Modeling rules are developed for several specific situations. It is shown how the graphical model can be translated to a system of linear equations and constraints.

• Proceedings of the KIEE Conference
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• 1997.07b
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• pp.590-592
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• 1997

A Discrete Event Dynamic System is a system whose states change in response to the occurrence of events from a predefined event set. A major difficulty in developing analytical results for the systems is the lack of appropriate modeling techniques. This paper proposes the use of Real-time Temporal Logic as a modeling tool for the analysis and control of DEDS. The Real-time Temporal Logic Frameworks is extended with a suitable structure of modeling hard real-time constraints. Modeling rules are developed for several specific situations. It is shown how the graphical model can be translated to a system of linear equations and constraints.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.14 no.4
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• pp.332-339
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• 2014

Face classification has wide applications in security and surveillance. However, this technique presents various challenges caused by pose, illumination, and expression changes. Face recognition with long-distance images involves additional challenges, owing to focusing problems and motion blurring. Multiple frames under varying spatial or temporal settings can acquire additional information, which can be used to achieve improved classification performance. This study investigates the effectiveness of multi-frame decision-level fusion with photon-counting linear discriminant analysis. Multiple frames generate multiple scores for each class. The fusion process comprises three stages: score normalization, score validation, and score combination. Candidate scores are selected during the score validation process, after the scores are normalized. The score validation process removes bad scores that can degrade the final output. The selected candidate scores are combined using one of the following fusion rules: maximum, averaging, and majority voting. Degraded facial images are employed to demonstrate the robustness of multi-frame decision-level fusion in harsh environments. Out-of-focus and motion blurring point-spread functions are applied to the test images, to simulate long-distance acquisition. Experimental results with three facial data sets indicate the efficiency of the proposed decision-level fusion scheme.

• Proceedings of the Korean Information Science Society Conference
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• 2012.06b
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• pp.153-154
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• 2012

바디 센서 시스템 환경이란 사용자가 서기, 걷기, 뛰기 등의 행위를 통해 주기적으로 상황이 변하는 동적 환경이다. 이와 같은 시스템에서는 크기가 작고 저전력을 요구하는 센서가 탑재되기 때문에 효율적인 알고리즘을 적용하는 것은 매우 중요한 일이다. 모델체커는 최근 소프트웨어 모델 (Model)을 검증하는 도구로써 주어진 모델과 속성값을 통해 해당 모델의 검증 (Verification) 결과가 참인지 거짓인지 판별해 준다. 본 논문에서는 효율적인 바디 센서 시스템 구축을 위해 서기, 걷기, 뛰기라는 환경에서 개별적으로 동작되는 알고리즘을 모델링 하고 LTL(Linear Temporal Logic) 로 속성을 명세하여 NuSMV 모델 체커를 통해 해당 모델의 Safety와 Liveness를 검증한다.

• Proceedings of the Korea Information Processing Society Conference
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• 2010.11a
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• pp.295-298
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• 2010

Linear Temporal Logic synthesis 는 LTL formula 로 표현된 요구 사항으로부터 그것을 만족하는 시스템을 만들어낸다. 이러한 synthesis 과정은 2EXPTIME-complete 이 요구 되지만 GR formula 라는 특수한 형태를 사용함으로써 복잡도를 Polynomial 시간으로 줄일 수 있다. LTL synthesis 는 작업 공간, 로봇이 취하는 센서 정보와 액션의 종류, 상위 수준의 작업 명세를 입력으로 받아 GR formula 형태로 변환하고, 기대되는 작업이 실현 가능하다면 그것을 성취할 수 있는 오토마타를 생성해낸다. Synthesis 알고리즘을 구현한 LTLMoP 라는 도구를 이용하여 LTL synthesis 과정을 보이고 화성 행궁의 미아 찾기 로봇 작업 계획을 구현한다. 마지막으로 시뮬레이션 과정을 통해 기대하는 작업을 성공적으로 성취할 수 있음을 보인다.

• Journal of KIISE:Software and Applications
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• v.35 no.9
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• pp.529-537
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• 2008

Since concurrent software is hard to debug, the verification of such systems inevitably needs automatic tools which support exhaustive searching. Bounded Model Checking (BMC) is one of them. Within a bound k, BMC exhaustively check some errors in execution traces of the given system. In this paper, we introduce the tool that performs BMC for LTS, modeling language for concurrent programs. In this tool, a property is described by a FLTL formula, which is suitable to present the property with actions in a LTS model. To experiment with existential model checkers and out tool, we compare and analysis the performance of the developed tool and others.

• Journal of KIISE:Software and Applications
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• v.34 no.8
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• pp.743-751
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• 2007

Model checking has been successfully applied to hardware verification. Software is more subtle than hardware with respect to formal verification due to its infinite state space. Although there are many research activities in this area, bounded model checking is regarded as a promising technique. Bounded model checking uses an upper bound to unroll its model, which is the main advantage of bounded model checking compared to other model checking techniques. In this paper, we applied bounded model checking to verify BIR which is the input model for the model checking tool BOGOR. Some BIR examples are verified with our technique. Experimental results show that bounded model checking is better than explicit model checking provided by BOGOR. This paper presents the formalization of BIR and the encoding algorithm of BIR into CNF.

• Journal of Information Processing Systems
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• v.15 no.3
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• pp.570-592
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• 2019

The Event-B design pattern is an excellent way to quickly develop a formal model of the system. Researchers have proposed a number of Event-B design patterns, but they all lack formal behavior semantics. This makes the analysis, verification, and simulation of the behavior of the Event-B model very difficult, especially for the control-intensive systems. In this paper, we propose a novel method to transform the Event-B synchronous control flow design pattern into the labeled transition system (LTS) behavior model. Then we map the design pattern instantiation process of Event-B to the instantiation process of LTS model and get the LTS behavior semantic model of Event-B model of a multi-level complex control system. Finally, we verify the linear temporal logic behavior properties of the LTS model. The experimental results show that the analysis and simulation of system behavior become easier and the verification of the behavior properties of the system become convenient after the Event-B model is converted to the LTS model.