• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.3
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• pp.707-714
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• 2010

Since an LFSR(linear feedback shift register) as a pattern generator has solely linear dependency in itself, it generates sequences by moving the bit positions for pattern generation. So the correlation between the generated patterns is high and thus reduces the possibility of fault detection. To overcome these problems many researchers studied to have goodness of randomness between the output test patterns. In this paper, we propose the new and effective method to construct phase shifter as PRPG(pseudo random pattern generator).

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.7
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• pp.93-101
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• 2010

In this paper we generate Gold-sequence by using M-sequence which is made by two primitive polynomial of GF(2). Generally M-sequence is generated by linear feedback shift register code generator. Here we show that this matrix of appropriate permutation has Hadamard matrix property. This matrix proves that Gold-sequence through two M-sequence and additive matrix of one column has one of major properties of Hadamard matrix, orthogonal. and this matrix show another property that multiplication with one matrix and transpose matrix of this matrix have the result of unit matrix. Also M-sequence which is made by linear feedback shift register gets Hadamard matrix property mentioned above by adding matrices of one column and one row. And high-speed conversion is possible through L-matrix and the S-matrix.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.7C
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• pp.663-670
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• 2009

In this paper, we propose the image encryption method which gradually uses NFSR(Non-linear Feedback Shift Register) and 20 CAT(Two-Dimensional Cellular Automata Transform). The encryption method is processed in the following order. First, NFSR is used to create a PN(pseudo noise) sequence, which matches the size of the original image. Then, the created sequence goes through a XOR operation with the original image and process the encipherment. Next, the gateway value is set to produce a 20 CAT basis function. The produced basis function is multiplied by encryption image that has been converted to process the 20 CAT encipherment. Lastly, the results of the experiment which are key space analysis, entropy analysis, and sensitivity analysis verify that the proposed method is efficient and very secure.

• Journal of Korea Society of Industrial Information Systems
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• v.10 no.3
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• pp.57-63
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• 2005

Kim and Fenn et al. proposed two modular AB multipliers based on LFSR(Linear Feedback Shift Register) architecture. These multipliers use AOP, which has all coefficients with '1', as an irreducible polynomial. Thereby, they have good hardware complexity compared to the previous architectures. This paper proposes a modular $AB^2$ multiplier based on LFSR architecture and a modular exponentiation architecture to improve the hardware complexity of the Kim's. Our multiplier also use the AOP as an irreducible polynomial as the Kim architecture. Simulation result shows that our multiplier reduces the hardware complexity about $50\%$ in the perspective of XOR and AND gates compared to the Kim's. The architecture could be used as a basic block to implement public-key cryptosystems.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.2
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• pp.93-98
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• 2003

This paper presents two new algorithms and their architectures for $AB^2 $ multiplication over $GF(2^m)$.First, a new architecture with a new algorithm is designed based on LFSR (Linear Feedback Shift Register) architecture. Furthermore, modified $AB^2 $ multiplier is derived from the multiplier. The multipliers and the structure use AOP (All One Polynomial) as a modulus, which hat the properties of ail coefficients with 1. Simulation results thews that proposed architecture has lower hardware complexity than previous architectures. They could be. Therefore it is useful for implementing the exponential ion architecture, which is the tore operation In public-key cryptosystems.

• Proceedings of the KIEE Conference
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• 1987.07b
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• pp.1622-1624
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• 1987

In general, pseudo noise generator(PNG) used for PLR System consists of linear feedback shift register. Based on a W.F. representation of shift registers, a method for analyzing operational characters & sequence of PNG are studied. PNG is characterized by the time-recursive equation & PNG sequence is analyzed by the output state variable equation. Methods studied in this paper are illustrated by appropriate example.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1991.10a
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• pp.100-102
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• 1991

In this paper, we use LFSR(Linear Feedback Shift Register) as a kind of pseudo-random one-time pad. Key generator is constructed using r separate LFSR's with IP(Irreducible Polynominal) which are relatively prime. Key generated in this method has high linear complexity. And also, file cryptosystem for file encryption and decryption is constructed.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.10
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• pp.507-511
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• 2005

We have derived the linear complexity of a binary sequence generated by a Feedback with Carry Shift Regiater(FCSR) under the following condition: q is a power of a prime such that $q=r^e,\;(e{\geq}2)$ and r=2p+1, where both r and p are 2-prime. Also, a summation generator creates sequence from addition with carry of LFSR(Linear Feedback Shift Register) sequences. Similarly, it is possible to generate keystream by bitwise exclusive-oring on two FCSR sequences. In this paper, we described the cryptographic properties of a sequence generated by the FCSRs in view of the linear complexity.

• The Transactions of the Korea Information Processing Society
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• v.1 no.2
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• pp.272-278
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• 1994

The paper proposes a test pattern generator and a signature analyzer for pseudoexhaustive testing of the combinational circuit part within a sequential circuit when performing built-in self test of the circuit. The test pattern generator can scan in the seed test pattern and generate exhaustive test patterns. The signature analyzer can perform the analysis of the circuit response and scan out the result. Such test pattern generator and signature analyzer have been developed using SRL(shift register latch) and LFSR(linear feedback shift register).

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1931_1933
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• 2009

NoC 기반 시스템이 적용되는 설계는 시스템 크기가 커짐에 따라 칩 테스트 문제도 동시에 제기 되고 있다. 이에 따라 NoC 기반의 시스템의 테스트 시간을 줄일 수 있는 internal test 방식의 새로운 BIST(Built-in Self-Test) 구조에 관한 연구를 하였다. 기존의 NoC 기반 시스템의 BIST 테스트 구조는 각각의 router와 core에 BIST logic과 random pattern generator로 LFSR(Linear Feedback Shift Register)을 사용하여 연결하는 individual 방식과 하나의 BIST logic과 LFSR을 사용하여 각각의 router와 core에 병렬로 연결하는 distributed 방식을 사용한다. 이때, LFSR에서 생성된 테스트 벡터가 router에 사용되는 FIFO 메모리를 통과하면서 생기는 테스트 타임 증가를 줄이기 위하여 shift register 형태의 FIFO 메모리를 변경하였다 제안된 방법에서 테스트 커버리지 98%이상을 달성하였고, area overhead면에서 효과를 볼 수 있다.