• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.2
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• pp.184-191
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• 1993

Continuous-time integrated filters, implemented in MOS VLSI technology, have been receiving considerable attention. In this paper, a continuous-time fifth order elliptic low-pass MOSFET-C filter has been designed with a cutoff frequency 3,400Hz. First an active RC filter is designed using cascade method which each block can be tunable. And then the resistors of an active RC network are replaced by a linear resistor using NMOS depletion transistors operated in the triode region. This continuous-time MOSFET filter have simpler structure than switched-capacitor filter, so reduce the chip area. The designed MOSFET-C filter characteristics are simulated by PSPICE program.

• The Transactions of the Korean Institute of Power Electronics
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• v.13 no.1
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• pp.55-62
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• 2008

This paper proposes a feedback linearization control scheme of AC/DC PWM converters with LCL input filters using no damping resisters. This feedback linearization scheme can eliminate the non-linearity of the system. So, the controller of the system can be designed by using linear control theory, which gives a good transient response. The cascade structure of the controller makes the converter current be controlled within a certain limit. To reduce the number of sensors, the source voltage and current is estimated. The validity of the proposed control algorithm is verified by simulation and experimental results.

• Transactions of the Korean Society of Mechanical Engineers
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• v.16 no.3
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• pp.527-539
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• 1992

본 연구에서는 터빈익렬의 입구유동면에 주어지는 끝벽 경계층유동에 의하여 익렬 내의 유동에서 발생하는 여러 와류들에 의한 2차 유동과 이와 연관된 여러가지 3차원 점성유동 현상 그리고 이에 따른 유동손실을 보다 정확히 예측하기 위한 수치해 석적 연구를 수행하였으며, 이에 필요한 수치해석적 연구를 수행하였으며, 이에 필요 한 수치해석코드를 작성하였다.유동특성에 대하여 상세한 연구결과가 보고되어 있 는 UTRC(United Technologies Research Center) 평면 터빈익렬을 연구대상으로 채택하 여 익렬 내의 3차원 유동특성을 연구하고 계산한 결과를 기존의 결과와 비교 검토하였 다. 강한 2차유동이 존재하는 경우에 발생하는 수치확산을 감소시키기 위하여 대류 항에 대하여 2차 정확도(second-order accuracy)의 선형상류도식(linear upwind sche- me)을 사용하여 일반적으로 널리 사용되는 하이브리드도식(hybrid scheme)에 의한 해 석결과와 비교하였다. 터빈익렬 내의 난류 유동은 익렬의 회전과 유선의 만곡 등에 의한 영향으로 복잡한 유동현상을 나타내지만, 터빈익렬 내의 난류유동 특성에 대한 실험결과가 아직까지는 부족하고 또한 본 연구에서는 평균유동값의 정확한 해석에 중 점을 두었으므로 표준 k-.epsilon. 모델을 사용하였다.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.28 no.2B
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• pp.215-224
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• 2008

The effect of streamflow considering future land use change and vegetation index information by climate change scenario was assessed using SLURP (Semi-distributed Land-Use Runoff Process) model. The model was calibrated and verified using 4 years (1999-2002) daily observed streamflow data for the upstream watershed ($260.4km^2$) of Gyeongan water level gauging station. By applying CA-Markov technique, the future land uses (2030, 2060, 2090) were predicted after test the comparison of 2004 Landsat land use and 2004 CA-Markov land use by 1996 and 2000 land use data. The future land use showed a tendency that the forest and paddy decreased while urban, grassland and bareground increased. The future vegetation indices (2030, 2060, 2090) were estimated by the equation of linear regression between monthly NDVI of NOAA AVHRR images and monthly mean temperature of 5 years (1998-2002). Using CCCma CGCM2 simulation result based on SRES A2 and B2 scenario (2030s, 2060s, 2090s) of IPCC and data were downscaled by Stochastic Spatio-Temporal Random Cascade Model (SST-RCM) technique, the model showed that the future runoff ratio was predicted from 13% to 34% while the runoff ratio of 1999-2002 was 59%. On the other hand, the impact on runoff ratio by land use change showed about 0.1% to 1% increase.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.1
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• pp.40-48
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• 2000

1A novel bipolar linear transconductor and its application to operational transconductance amplifier(OTA) for low-voltage low-power signal processing is proposed. The transconductor consists of a npn differential-pair with emitter degeneration resistor and a pnp differential-pair connected to the npn differential-pair in cascade. The bias current of the pnp differential-pair is used with the output current of the npn differential-pair for wide linearity and temperature stability. The OTA consists of the linear transconductor and a translinear current cell followed by three current mirrors. The proposed transconductor has superior linearity and low-voltage low-power characteristics when compared with the conventional transconductor. The experimental results show that the transconductor with transconductance of 50 ${\mu}S$ has a linearity error of less than ${\pm}$0.06% over an input voltage range from -2V to +2V at supply voltage ${\pm}$3V. Power dissipation of the transconductor was 2.44 mW. A prototype OTA with a transconductance of 25 ${\mu}S$ has been built with bipolar transistor array. The linearity of the OTA was same as the proposed transconductor. The OTA circuit also exhibits a transconductance that is linearly dependent on a bias current varying over four decades with a sensitivity of 0.5 S/A.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.3
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• pp.48-58
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• 1999

In this paper, a new parallel computation method, which fully utilize the parallel processors both in mesh generation and FEM calculation for 2D/3D process simulation, is presented. High performance parallel FEM and parallel linear algebra solving technique was showed that excessive computational requirement of memory size and CPU time for the three-dimensional simulation could be treated successively. Our parallelized numerical solver successfully interpreted the transient enhanced diffusion (TED) phenomena of dopant diffusion and irregular shape of R-LOCOS within 15 minutes. Monte Carlo technique requires excessive computational requirement of CPU time. Therefore high performance parallel solving technique were employed to our cascade sputter simulation. The simulation results of Our sputter simulator allowed the calculation time of 520 sec and speedup of 25 using 30 processors. We found the optimized number of ion injection of our MC sputter simulation is 30,000.

• The Korean Journal of Applied Statistics
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• v.31 no.5
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• pp.539-554
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• 2018

Effective interaction between user and device is considered an important ability of IoT devices. For some applications, it is necessary to recognize human facial expressions in real time and make accurate judgments in order to respond to situations correctly. Therefore, many researches on facial image analysis have been preceded in order to construct a more accurate and faster recognition system. In this study, we constructed an automatic recognition system for facial expressions through two steps - a facial recognition step and a classification step. We compared various models with different sets of data with pixel information, landmark coordinates, Euclidean distances among landmark points, and arctangent angles. We found a fast and efficient prediction model with only 30 principal components of face landmark information. We applied several prediction models, that included linear discriminant analysis (LDA), random forests, support vector machine (SVM), and bagging; consequently, an SVM model gives the best result. The LDA model gives the second best prediction accuracy but it can fit and predict data faster than SVM and other methods. Finally, we compared our method to Microsoft Azure Emotion API and Convolution Neural Network (CNN). Our method gives a very competitive result.

• Journal of Advanced Navigation Technology
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• v.9 no.2
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• pp.103-109
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• 2005

This paper presents the design of a broadband hybrid mixer using dual-gate FET topology with a low-pass filter which improves return loss of output to isolate RF and LO signal. The low-pass filter shows the isolation with RF and LO signal of better than 40 dBc from 1.5 GHz to 5.5 GHz. The dual-gate mixer which has been designed by using cascade topology operates when the lower FET is biased in linear region and the upper FET is in saturation region. The input matching circuit has been designed to have conversion gain from 1.5 GHz to 5.5 GHz. The designed mixer with low-pass filter shows the conversion gain of better than 7 dB from 1.5 GHz to 5.5 GHz at the low LO power level of 0 dBm with the fixed IF frequency of 21.4 MHz.

• Journal of international Conference on Electrical Machines and Systems
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• v.3 no.1
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• pp.78-82
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• 2014

Power Transformers with more than one secondary winding are not uncommon in industrial applications. But new classes of applications where very large number of independent secondaries are used are becoming popular in controlled converters for medium and high voltage applications. Cascade H-bridge medium voltage drives and Pulse Step Modulation (PSM) based high voltage power supplies are such applications. Regulated high voltage power supplies (Fig. 1) with 35-100 kV, 5-10 MW output range with very fast dynamics (${\mu}S$ order) uses such transformers. Such power supplies are widely used in fusion research. Here series connection of isolated voltage sources with conventional switching semiconductor devices is achieved by large number of separate transformers or by single unit of multi-secondary transformer. Naturally, a transformer having numbers of secondary windings (~40) on single core is the preferred solution due to space and cost considerations. For design and simulation analysis of such a power supply, the model of a multi-secondary transformer poses special problem to any circuit analysis software as many simulation softwares provide transformer models with limited number (3-6) of secondary windings. Multi-Secondary transformer models with 3 different schemes are available. A comparison of test results from a practical Multi-secondary transformer with a simulation model using magnetic component is found to describe the behavior closer to observed test results. Earlier models assumed magnetising inductance in a linear loss less core model although in actual it is saturable core made-up of CRGO steel laminations. This article discusses a more detailed representation of flux coupled magnetic model with saturable core properties to simulate actual transformers very close to its observed parameters in test and actual usage.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.11
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• pp.1055-1063
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• 2013

Low noise amplifiers(LNAs) are an integral component of RF receivers and are frequently required to operate at wide frequency bands for various wireless systems. For wideband operation, important performance metrics such as voltage gain, return loss, noise figures and linearity have been carefully investigated and characterized for the proposed LNA. An inductive shunt feedback configuration is successfully employed in the input stage of the proposed LNA which incorporates cascaded networks with a peaking inductor in the buffer stage. Design equations for obtaining low and high input matching frequencies are easily derived, leading to a relatively simple method for circuit implementation. Careful theoretical analysis explains that poles and zeros are characterized and utilized for realizing the wideband response. Linearity is significantly improved because the inductor between gate and drain decreases the third-order harmonics at the output. Fabricated in $0.18{\mu}m$ CMOS process, the chip area of this LNA is $0.202mm^2$, including pads. Measurement results illustrate that input return loss shows less than -7 dB, voltage gain greater than 8 dB, and a little high noise figure around 7~8 dB over 1.5~13 GHz. In addition, good linearity(IIP3) of 2.5 dBm is achieved at 8 GHz and 14 mA of current is consumed from a 1.8 V supply.