• 대한전자공학회논문지SD
• /
• 제44권2호
• /
• pp.95-103
• /
• 2007

동적 전압 조절(Dynamic voltage scaling, DVS) 기법은 가장 효과적이면서 가장 잘 알려진 전력 관리 기법 중 하나이다. DVS가 효율적인 여유 시간(Slack time) 분배 방법, 전압 할당 방법 등 다양한 방면에서 연구되었지만, 전압 변경 가능 프로세서 이외의 장치들에 대한 영향은 제대로 연구되지 못했다. DC-DC 변환기는 오늘날 대부분의 내장형 시스템에서 내부 장치들을 위한 다양한 값의 공급 전압 생성 및 전압 안정화 기능을 제공하는 중요한 역할을 하고 있으며, 특히 공급 전압의 계속적인 변경이 필요한 DVS를 적용하기 위해서는 필수적인 구성 요소이다. 이 논문에서는 DC-DC 변환기의 전력 소모를 포함한 시스템의 에너지 소모에 대해 분석하고 이를 바탕으로 DC-DC 변환기를 포함하는 시스템 또는 이와 유사한 형태의 에너지 소모 특성을 가지는 시스템에서 에너지 소모를 최소화하는 새로운 에너지 최적 오프라인 DVS 스케줄링 알고리즘을 제안하고, 실험 결과를 통해 제안된 알고리즘이 어떤 종류의 설정에서도 기존의 DVS 알고리즘보다 더 적은 에너지 소모의 스케줄을 생성함을 보여준다.

• Journal of Power Electronics
• /
• 제12권5호
• /
• pp.787-799
• /
• 2012

Real and reactive power flows on a transmission line interact inherently. This situation degrades power flow controller performance when independent real and reactive power flow regulation is required. In this study, a quasi multi-pulse interline power flow controller (IPFC), consisting of eight six-pulse voltage source converters (VSC) switched at the fundamental frequency is proposed to control real and reactive power flows dynamically on a transmission line in response to a sequence of set-point changes formed by unit-step reference values. It is shown that the proposed hybrid fuzzy-PI commanded IPFC shows better decoupling performance than the parameter optimized PI controllers with analytically calculated feed-forward gains for decoupling. Comparative simulation studies are carried out on a 4-machine 4-bus test power system through a number of case studies. While only the fuzzy inference of the proposed control scheme has been modeled in MATLAB, the power system, converter power circuit, control and calculation blocks have been simulated in PSCAD/EMTDC by interfacing these two packages on-line.

• 제어로봇시스템학회논문지
• /
• 제13권2호
• /
• pp.154-162
• /
• 2007

In this paper, we propose a new AC-DC converter control method to comply with harmonics regulation(IEC 61000-3) effective for the inverter system of an air conditioner whose power consumption is less than 2,500W. There are many different ways of AC-DC converter control, but this paper focuses on the converter control method that is adopting an input reactor with low cost silicon steel core to strengthen cost competitiveness of the manufacturer. The proposed control method controls input current every half cycle of the line frequency to get unit power factor and at the same time to reduce switching loss of devices and acoustic noise from reactor. This kind of converter is known as a Partial Switching Converter(PSC). In this study, theoretical analysis of the PSC has been performed using Matlab/Simulink while a 16-bit micro-processor based converter has been used to perform the experimental analysis. In the theoretical analysis, electrical circuit models and equations of the PSC are derived and simulated. In the experiments, micro-processor controls input current to keep the power factor above 0.95 by reducing the phase difference between input voltage and current and at the same time to maintain a reference DC-link voltage against voltage drop which depends on DC-link load. Therefore it becomes possible to comply with harmonic regulations while the power factor is maximized by optimizing the time of current flow through the input reactor for every half cycle of line frequency.

• 한국산학기술학회논문지
• /
• 제16권2호
• /
• pp.1355-1363
• /
• 2015

태양광전원이 연계된 배전계통에서 발생되는 과전압문제를 해소하기 위하여, 계통에서 발생하는 전압변동에 대응하여 전압을 일정하게 유지시킬 수 있는 선로 전압 조정장치(Step Voltage Regulator)의 도입이 제안되고 있다. 일반적으로 SVR은 전압조정 방법에 의하여 Tap위치를 결정한 후, 일정시간이 지나면 Tap이 동작하도록 운용된다. 하지만 지연시간(30sec) 이후에 Tap을 동작시키는 SVR의 특성에 의하여, 이 시간동안 수용가전압은 규정치를 벗어날 가능성을 가지고 있다. 따라서 본 논문에서는 배전계통의 상용소프트웨어인 PSCAD/EMTDC를 이용하여 LDC방법에 의한 SVR의 전압조정 모델링과, 양방향으로 유무효전력을 제어할 수 있는 전지전력저장장치(Battery Energy Storage System)의 모델링을 제안하였다. 또한 SVR의 문제점을 보완하기 위하여, BESS와의 협조방안에 대한 모델링을 제시하였다. 상기에서 제안한 모델링을 바탕으로 수용가의 전압특성을 분석한 결과, SVR과 BESS에 의하여 안정적으로 전압이 유지됨을 확인하여, 본 연구에서 제시한 모델링의 유효성을 입증하였다.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2001년도 하계학술대회 논문집 A
• /
• pp.285-288
• /
• 2001

In this paper we proposed the on line volt/var control schemes of the load Tap Changer (LTC) transformer and shunt capacitor bank for distribution volt/var regulation. In the existing volt/var control of the distribution substation, the voltage of feeders and var of distribution systems is mainly controlled by the LTC transformer tap position and on/off status of the shunt capacitor. The LTC and shunt capacitor bank has discrete operation characteristics and therefore it is very difficult to control volt/var at the distribution networks within the satisfactory levels. Also there is limitation of the operation times of the LTC and shunt capacitor bank because it is affects on their functional lifetime. The proposed volt/var control algorithm determine an optimal tap position of LTC and on/off status of shunt capacitors at a distribution network with the multiple feeders. The mathematical equations of the proposed method are introduced. Simple case study was performed to verify the effectiveness of the proposed method.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2003년도 하계학술대회 논문집 A
• /
• pp.399-402
• /
• 2003

In this paper, the on line volt/var control algorithms of the food Load Tap Changer (LTC) transformer and Shunt Capacitor(SC) are proposed for distribution volt/var regulation. In the existing volt/var control of the distribution substation, the voltage of feeders and var of distribution systems is mainly controlled by the LTC transformer tap position and on/off status of the shunt capacitor. The LTC and shunt capacitor bank has discrete operation characteristics and therefore it is very difficult to control volt/var at the distribution networks within the satisfactory levels. Also there is limitation of the operation times of the LTC and shunt capacitor bank because it is affects on their functional lifetime. The proposed volt/var control algorithm determine an optimal tap position of LTC and on/off status of shunt capacitors at a distribution network with the multiple feeders. The mathematical equations of the proposed method are introduced. Simple case study was performed to verify the effectiveness of the proposed method.

• 전기학회논문지P
• /
• 제51권3호
• /
• pp.120-125
• /
• 2002

The switching-mode power converter has been widely used because of its features of high efficiency and small weight and size. These features are brought by the ON-OFF operation of semiconductor switching devices. However, this switching operation causes the surge and EMI(Electromagnetic Interference) which deteriorate the reliability of the converter themselves and entire electronic systems. This problem on the surge and noise is one of the most serious difficulties in AC-to-DC converter. In the switching-mode power converter, the output voltage is generally controlled by varying the duty ratio of main switch. When a converter operates in steady state, duty ratio of the converter is kept constant. So the power of switching noise is concentrated in specific frequencies. Generally, to reduce the EMI and improve the immunity of converter system, the switching frequency of converter needs to be properly modulated during a rectified line period instead of being kept constant. Random Pulse Width Modulation (RPWM) is performed by adding a random perturbation to switching instant while output-voltage regulation of converter is performed. RPWM method for reducing conducted EMI in single switch three phase discontinuous conduction mode boost converter is presented. The more white noise is injected, the more conducted EMI is reduced. But output-voltage is not sufficiently regulated. This is the reason why carrier frequency selection topology is proposed. In the case of carrier frequency selection, output-voltage of steady state and transient state is fully regulated. A RPWM control method was proposed in order to smooth the switching noise spectrum and reduce it's level. Experimental results are verified by converter operating at 300V/1kW with 5%~30% white noise input. Spectrum analysis is performed on the Phase current and the CM noise voltage. The former is measured with Current Probe and the latter is achieved with LISN, which are connected to the spectrum analyzer respectively.

• 한국산학기술학회논문지
• /
• 제11권4호
• /
• pp.1222-1228
• /
• 2010

고속 PMIC를 위한 빠른 천이 응답 시간을 가지는 CMOS LDO 레귤레이터를 설계하였다. 제안하는 LDO 레귤레이터 회로는 기준전압회로와 오류증폭회로, 파워 트랜지스터 등으로 이루어지며, 출력전압의 안정성을 높이기 위하여 오류증폭 회로와 파워 트랜지스터 사이에 버퍼로써 2단 광대역 OTA를 추가하였다. 기존의 연구에서 제안된 가장 간단하게 구현할 수 있는 버퍼로는 소스팔로워 구조가 있으나, 출력 스윙이 좁고 신호 대 잡음비가 저하되는 문제점이 있었다. 본 논문에서는 2단 광대역 OTA를 버퍼로 사용하여 LDO 전압 레귤레이터의 출력 특성을 개선하였다. $0.5{\mu}m$ CMOS 공정을 이용하여 모의실험 한 결과, 라인 레귤레이션은 16 mV/V, 부하 레귤레이션 0.007 %/mA를 얻었다.

• Journal of Power Electronics
• /
• 제15권6호
• /
• pp.1673-1681
• /
• 2015

A low dropout (LDO) regulator with a wide-bandwidth is proposed in this paper. The regulator features a Human Body Model (HBM) 8kV-class high robustness ElectroStatic Discharge (ESD) protection circuit, and two error amplifiers (one with low gain and wide bandwidth, and the other with high gain and narrow bandwidth). The dual error amplifiers are located within the feedback loop of the LDO regulator, and they selectively amplify the signal according to its ripples. The proposed LDO regulator is more efficient in its regulation process because of its selective amplification according to frequency and bandwidth. Furthermore, the proposed regulator has the same gain as a conventional LDO at 62 dB with a 130 kHz-wide bandwidth, which is approximately 3.5 times that of a conventional LDO. The proposed device presents a fast response with improved load and line regulation characteristics. In addition, to prevent an increase in the area of the circuit, a body-driven fabrication technique was used for the error amplifier and the pass transistor. The proposed LDO regulator has an input voltage range of 2.5 V to 4.5 V, and it provides a load current of 100 mA in an output voltage range of 1.2 V to 4.1 V. In addition, to prevent damage in the Integrated Circuit (IC) as a result of static electricity, the reliability of IC was improved by embedding a self-produced 8 kV-class (Chip level) ESD protection circuit of a P-substrate-Triggered Silicon Controlled Rectifier (PTSCR) type with high robustness characteristics.

• 전기전자학회논문지
• /
• 제24권2호
• /
• pp.598-603
• /
• 2020

본 논문에서는 Push-Pull 패스 트랜지스터 구조로 인하여 향상된 Load Transient 특성을 향상시킨 LDO(Low Drop-Out)를 제안하였다. LDO 레귤레이터 내부의 오차증폭기의 출력단과 패스 트랜지스터의 게이트단 사이에 제안된 Push-Pull 회로와 출력단에 Push-Pull 회로를 추가하여 전압 라인에 들어오는 Overshoot, Undershoot를 개선시켜 기존의 LDO 레귤레이터보다 개선된 Load Transient 특성의 델타 피크 전압 값을 갖는다. 제안하는 회로는 Cadence의 Virtuoso, Spectre 시뮬레이션을 이용하여 삼성 0.13um 공정에서 특성을 분석하였다.