• Title/Summary/Keyword: Lifting DWT

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Overdrive Frame Memory Reduction Using a Fast Discrete Wavelet Transform (고속 이산 웨이블릿 변환을 이용한 Overdrive 프레임 메모리 축소)

  • Seong, Jeong-Hoon;Moon, Hyeok;Chun, Ik-Jae;Kim, Bo-Gwan
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.933-936
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    • 2005
  • Applications of LCD panel are getting more increased for motion-image applications. However, when the motion-images are displayed on LCD panels, they may be blurred due to slow response time of liquid crystal (LC). One of the solutions of the problem is overdrive technique. The technique has a lot of memory usage. In this paper, we propose a reduction method of the frame memory that is required for LCD overdrive. Proposed overdrive architecture consists of line-based lifting integer (5, 3) DWT filter for image data reduction and BLI (Bi-Linearly Interpolation) LUT for pixel value accelerating.

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Hardware Architecture of High Performance Cipher for Security of Digital Hologram (디지털 홀로그램의 보안을 위한 고성능 암호화기의 하드웨어 구조)

  • Seo, Young-Ho;Yoo, Ji-Sang;Kim, Dong-Wook
    • Journal of Broadcast Engineering
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    • v.17 no.2
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    • pp.374-387
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    • 2012
  • In this paper, we implement a new hardware for finding the significant coefficients of a digital hologram and ciphering them using discrete wavelet packet transform (DWPT). Discrete wavelet transform (DWT) and packetization of subbands is used, and the adopted ciphering technique can encrypt the subbands with various robustness based on the level of the wavelet transform and the threshold of subband energy. The hologram encryption consists of two parts; the first is to process DWPT, and the second is to encrypt the coefficients. We propose a lifting based hardware architecture for fast DWPT and block ciphering system with multi-mode for the various types of encryption. The unit cell which calculates the repeated arithmetic with the same structure is proposed and then it is expanded to the lifting kernel hardware. The block ciphering system is configured with three block cipher, AES, SEED and 3DES and encrypt and decrypt data with minimal latency time(minimum 128 clocks, maximum 256 clock) in real time. The information of a digital hologram can be hided by encrypting 0.032% data of all. The implemented hardware used about 200K gates in $0.25{\mu}m$ CMOS library and was stably operated with 165MHz clock frequency in timing simulation.

A Encryption Technique of JPEG2000 Image Using 3-Dimensional Chaotic Cat Map (3차원 카오스 캣맵을 이용한 JPEG2000 영상의 암호화 기술)

  • Choi, Hyun-Jun;Kim, Soo-Min;Seo, Young-Ho;Kim, Dong-Wook
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.42 no.5 s.305
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    • pp.173-180
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    • 2005
  • In this paper, we proposed the image hiding method which decreases calculation amount by encrypt partial data using discrete wavelet transform(DWT) and linear scale quantization which were adopted as the main technique for frequency transform in JPEG2000 standard. Also we used the chaotic system and cat map which has smaller calculation amount than other encryption algorithms and then dramatically decreased calculation amount. This method operates encryption process between quantization and entropy coding for preserving compression ratio of images and uses the subband selection method. Also, suggested encryption method to JPEG2000 progressive transmission. The experiments have been performed with the Proposed methods implemented in software for about 500 images. Consequently, we are sure that the proposed is efficient image encryption methods to acquire the high encryption effect with small amount of encryption. It has been shown that there exits a relation of trade-off between the execution time and the effect of the encryption. It means that the proposed methods can be selectively used according to the application areas.