• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
• /
• pp.565-568
• /
• 2004

An alkoxide-based sol-gel method was used to fabricate $Ba_{0.6}Sr_{0.4}TiO_3$ thin films doped by Bi from 5 to 20 mol% on a Pt/Ti/SiO2/Si substrate. The structural and dielectric properties of BST thin films were investigated as a function of Bi dopant concentration. The dielectric properties of the Bi doped BST films were strongly dependent on the Bi contents. The dielectric constant and dielectric loss of the films decreased with increasing Bi content. However, the leakage current density of the 10 mol% Bi doped $Ba_{0.6}Sr_{0.4}TiO_3$ thin film showed the lowest value of 5.13 10-7 at 5 V. The figure of merit (FOM) reached a maximum value of 32.42 at a 10 mol% Bi doped $Ba_{0.6}Sr_{0.4}TiO_3$ thin films. The dielectric constant, loss factor, and tunability of the 10 mol% Bi doped $BBa_{0.6}Sr_{0.4}TiO_3$ thin films were 333,0.0095, and 31.1%, respectively.

• The Korean Journal of Ceramics
• /
• 제6권1호
• /
• pp.74-77
• /
• 2000

Ta-doped PZT thin films prepared by reactive co-sputtering method could be transformed into single grained perovskite structure utilizing physical etching of Pt bottom electrode. It is found that PZT perovskite phase on damaged (111) Pt electrode by IMD was more easily crystallized than random oriented Pt electrode and less crystallized than (111) Pt electrode. This shows that amorphized Pt electrode surface by IMD process has an effect on crystallization of PZT perovskite phase. 40$\mu\textrm{m}\times40\mu\textrm{m}$ square shape single grain PZT array could be obtained utilizing the difference of incubation time for nucleation of rosettes between ion damaged Pt and (111) oriented Pt electrode. Single grained PZT thin films show low leakage current density of $1\times10^{-7}$ A/$\textrm{cm}^2$ and high break down field of 440kV/cm. The loss of remanent polarization after $10^{11}$ cycles was less than 15% of initial value.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
• /
• pp.31-31
• /
• 2008

고주파 잡음 발생과 고집적화 문제 해결을 위해 고용량 디커플링 캐패시터를 기판에 내장하는 연구가 활발히 진행되고 있다. 본 연구에서는 초고주파 환경에서 고용량 기판 내장형 디커플링 캐패시터로의 응용을 위해 $BaTiO_3$박막을 에어로졸 데포지션 법을 이용하여 12~0.2 ${\mu}m$의 두께로 제조하였고 그 유전특성을 조사하였다. 그결과, 1 MHz에서 permittivity가 70, loss tangent은 3% 이하였으며, capacitance density는 $1{\mu}m$의 두께에서 59 nF/$cm^2$이었다. 하지만, 박막의 두께가 $1{\mu}m$ 이하에서는 XRD를 통해 결정성이 확인 되었음에도 큰 누설전류로 인해 유전특성을 확인할 수 없었다. 이 누설전류의 발생 원인을 조사하기 위해 $BaTiO_3$박막의 표면의 미세구조를 SEM으로 관찰한 결과 여러 결함들이 확인되었으며, 또한 전극 직경의 크기를 1.5 mm에서 0.33 mm로 작게 변화시킴으로서 그 유전특성을 조사하여 박막의 불균일성과 박막화의 가능성을 확인하였다.

• 전자공학회논문지A
• /
• 제33A권2호
• /
• pp.87-95
• /
• 1996

We have studied the effects of La concentration on the optical and electrical properties of lead lanthanum titanate (PLT) thin films by using sol-gel method. Both the optical and electrical properties are greatly affected by the La concentration. The refreactiv eindices of the films varied from 2.23 to 1.93 with varying La concentration in the range from 15 to 33 mol%. The dielectric constants of the films vary form 340 to 870 with varying La concentration in the range form 15 to 33 mol%. Hysteresis loop becomes slimmer with the increase of La concentration form 15 to 28mol% and little fatter again with the increase of La concentration form 28 to 33 mol%. Among the films investigated in this research, PLT(28) thin film shows the best dielectric properties for the application to the dielectrics of ULSI DRAM's. At the frequency of 100Hz, the dielectric constant and the loss tangent of PLT(28) thin films are 940 and 0.08 respectively. Its leakage current density at 1.5${\times}10^{5}$V/cm is 1${\times}10^{-6}A/cm^{2}$. The comparision between the simulated and the experimental curves for the switching transient characteristics shows that PLT (28) thin films behaves like normal dielectrics.

• 전자공학회논문지A
• /
• 제33A권2호
• /
• pp.114-121
• /
• 1996

Thin film Ba$^{0.7}Sr^{0.3}TiO^{3}$ (BST) capacitors were fabricated on SiO$_{2}$/Si substrates by RF magnetron sputtering method and characterized at microwave frequencies ranging from 40 MHz to 1GHz to examine the dielectric dispersion of the capacitors. The BST thin films were electrode material of BST thin films capacitor which is known as one of the best electrode materials for BST films. 50$\AA$-thick titanium (Ti) layers were introduced to increase adhesion between bottom Pt and SiO$_{2}$. The leakage current density of the capacitors was about 1.7${\times}10^{7}A/cm^{2}$ at 1.5V and the dielectric constant was about 140 at 1MHz. Microwave measurement patterns having a coplanar waveguide type were fabricated and their S parameters were measured using network analyzer. After de-embedding parasitic components in microwave measurement patterns nearly frequency-invariant dielectric constant of about 120 was extracted in the measurement range of 40 MHz to 1 GHz.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 1999년도 추계종합학술대회 논문집
• /
• pp.195-198
• /
• 1999

A Bi$_4$Ti$_3$O$_{12}$ (BIT) thin film is prepared by sol-gel method using acetate precursors and evaluated whether it could be applied to NVFRAM. The drying and the annealing temperature are 40$0^{\circ}C$ and $650^{\circ}C$, respectively and they are determined from the DT-TG analysis. The BIT thin film deposited on Pt/Ta/SiO$_2$/Si substrate shows orthorhombic perovskite phase. The grain size and the surface roughness are about 100 nm and 70.2$\AA$, respectively. The dielectric constant and the loss tangent at 10 KHz are 176 and 0.038, respectively, and the leakage current density at 100㎸/cm is 4.71$mutextrm{A}$/$\textrm{cm}^2$. In the results of hysteresis loops measured at $\pm$250㎸/cm, the remanent polarization (Pr) and the coercive field (Ec) are 5.92$mutextrm{A}$/$\textrm{cm}^2$ and 86.3㎸/cm, respectively. After applying 10$^{9}$ square pulses of $\pm$5V, the remanent polarization of the BIT thin film decreases as much as about 33% from 5.92 $\mu$C/$\textrm{cm}^2$ of initial state to 3.95 $\mu$C/$\textrm{cm}^2$.

• 한국세라믹학회지
• /
• 제35권5호
• /
• pp.472-478
• /
• 1998

Ferroelectric SrBi2Ta2O9(SBT) films were deposited on Pt/Ti/SiO2/Si substrates at 50$0^{\circ}C$ using a sintered SBT target Bi and Ta targets by modified rf magnetron sputtering and then were annealed at 80$0^{\circ}C$ for 10min in oxygen ambinet(760 torr) The composition of the SBT films could be easily controlled using the mul-ti-targets. The film composition of {{{{ {Sr }_{0.8 } {Bi }_{2.9 } {Ta}_{2.0 } {O }_{9 } }} was obtained with SBTd sputtering power of 100 W Bi of 25W and Ta of 10 W. A 250nm thick SBT films exhibited a dense and uniform microstructure and showed the remanent polarization(Pr) of 14.4 $\mu$C/cm2 and the coercive field({{{{ {E }_{c } }})of 60 kV/cm at applied voltage of 5 V. The SBT films show practically no polarization fatigue up to {{{{ {10 }_{10 } }} cycles under 5V bipolar pulse. The retention characteristics of the SBT films looked very promising and the leakage current density of the SBT films was about 1.23$\times${{{{ {10 }^{-7 } }}A/c{{{{ {m }^{2 } }} at 120kV/cm.

• 한국세라믹학회지
• /
• 제43권6호
• /
• pp.383-388
• /
• 2006

The varistor properties and DC accelerated aging characteristics of $ZnO-Pr_{6}O_{11}-CoO-Cr_{2}O_{3}$-based varistors were investigated at different $La_{2}O_3$ contents in the range of $0{\sim}2.0mol%$. The varistors doped with 0.5 mol% $La_{2}O_3$ exhibited good nonlinearity, with 81.6 in nonlinear coefficient. Increasing the $La_{2}O_3$ content further to 2.0 mol% caused the sintered density to increase, and the breakdown voltage and nonlinearity to decrease abruptly. The varistors with 0.5 mol% $La_{2}O_3$ exhibited the high electrical stability, with -1.14% in variation rate of breakdown voltage, -3.7% in variation rate of nonlinear coefficient, and +100% in variation rate of leakage current for specified DC accelerated aging stress condition (95% of breakdown voltage/$150^{\circ}C$/24 h).

• 전자공학회논문지A
• /
• 제32A권8호
• /
• pp.78-85
• /
• 1995

We fabricated the Pb$_{1-0.28{\alpha}}La_{0.28}TiO_{3}$ (PLT(28)) thin film successfully by using the sol-gel method and characterized it to evaluate its potential for being utilized as the capacitor dielectrics of ULSI DRAMs. In our sol-gel process, the acetates were used as the starting materials. Through the TGA-DTA analysis, we established the excellent fabrication conditions of the sol-gel method for the PLT(28) thin film. We obtained the dense and crack-free PLT(28) thin film of 100% perovskite phase by drying at 350$^{\circ}C$ after each coating and final annealing at 650$^{\circ}C$. Its electrical properties were measured from the planar capacitors fabricated on the Pt/Ti/SiO$_{2}$/Si substrate. By the P-E hysteresis measurement, its paraelectric phase was identified and its dielectric constant and leakage current density were measured as 936 and 1.1${\mu}A/cm^{2}$, respectively. Those electrical values indicate that the PLT(28) thin film is the most successful candidate for the capacitor dielectrics of ULSI DRAMs at the present.

• 대한임베디드공학회논문지
• /
• 제11권2호
• /
• pp.87-95
• /
• 2016

Nonvolatile memory (NVM) is being considered as an alternative of traditional memory devices such as SRAM and DRAM, which suffer from various limitations due to the technology scaling of modern integrated circuits. Although NVMs have advantages including nonvolatility, low leakage current, and high density, their inferior write performance in terms of energy and endurance becomes a major challenge to the successful design of NVM-based memory systems. In order to overcome the aforementioned drawback of the NVM, extensive research is required to develop energy- and endurance-aware optimization techniques for NVM-based memory systems. However, researchers have experienced difficulty in finding a suitable simulation tool to prototype and evaluate new NVM optimization schemes because existing simulation tools do not consider the feature of NVM devices. In this article, we introduce a NVM-based cache simulator to support rapid prototyping and evaluation of NVM-based caches, as well as energy- and endurance-aware NVM cache optimization schemes. We demonstrate that the proposed NVM cache simulator can easily prototype PRAM cache and PRAM+STT-RAM hybrid cache as well as evaluate various write traffic reduction schemes and wear leveling schemes.