• Journal of IKEEE
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• v.24 no.4
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• pp.961-968
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• 2020

This paper describes a design of high performance modular multiplier that is essentially used for elliptic curve cryptography. Our modular multiplier supports modular multiplications for five field sizes over GF(p), including 192, 224, 256, 384 and 521 bits as defined in NIST FIPS 186-2, and it calculates modular multiplication in two steps with integer multiplication and reduction. The Karatsuba-Ofman multiplication algorithm was used for fast integer multiplication, and the Lazy reduction algorithm was adopted for reduction operation. In addition, the Nikhilam division algorithm was used for the division operation included in the Lazy reduction. The division operation is performed only once for a given modulo value, and it was designed to skip division operation when continuous modular multiplications with the same modulo value are calculated. It was estimated that our modular multiplier can perform 6.4 million modular multiplications per second when operating at a clock frequency of 32 MHz. It occupied 456,400 gate equivalents (GEs), and the estimated clock frequency was 67 MHz when synthesized with a 180-nm CMOS cell library.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.3
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• pp.419-426
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• 2021

A high-performance elliptic curve cryptography processor (HP-ECCP) was designed to support five field sizes of 192, 224, 256, 384 and 521 bits over GF(p) defined in NIST FIPS 186-2, and it provides eight modes of arithmetic operations including ECPSM, ECPA, ECPD, MA, MS, MM, MI and MD. In order to make the HP-ECCP resistant to side-channel attacks, a modified left-to-right binary algorithm was used, in which point addition and point doubling operations are uniformly performed regardless of the Hamming weight of private key used for ECPSM. In addition, Karatsuba-Ofman multiplication algorithm (KOMA), Lazy reduction and Nikhilam division algorithms were adopted for designing high-performance modular multiplier that is the core arithmetic block for elliptic curve point operations. The HP-ECCP synthesized using a 180-nm CMOS cell library occupied 620,846 gate equivalents with a clock frequency of 67 MHz, and it was evaluated that an ECPSM with a field size of 256 bits can be computed 2,200 times per second.

• The KIPS Transactions:PartC
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• v.15C no.3
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• pp.149-156
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• 2008

JPEG2000 is the upcoming image coding standard that provides better compression rate and image quality compared with JPEG. Lazy-mode steganography guarantees the safe communication under the two information loss stages in JPEG2000. However, it causes the severe changes of the code-block noise variance sequence after embedding and that is detectable under the steganalysis using the Hilbert-Huang transform (HHT) based sequential analysis. In this paper, a JPEG2000 lazy-mode steganography method is presented. The code blocks which produce the sudden variation of the noise variance after embedding are estimated by calculating low precision code-block variance (LPV) and low precision code-block noise variance (LPNV). By avoiding those code-blocks from embedding, our algorithm preserves the sequence and makes stego images secure under the HHT-based steganalytic detection. In addition, it prevents a severe degradation of image quality by using JPEG2000 quality layer information. On various 2048 images, experiments are performed to show the effective reduction of the noise variation after message embedding and the stable performance against HHT-based steganalysis.