• Transactions on Electrical and Electronic Materials
• /
• v.13 no.1
• /
• pp.23-26
• /
• 2012

A zero-shrinkage sintering process in which the shrinkage of x-y axis is controlled to be zero is in great demand due to the trend of high integration in the ceramic modules. Among the zero-shrinkage sintering processes that are available, the proposed glass infiltration method where the viscous but fluidic glass infiltrates of the $Al_2O_3$ particles in the structure of $Al_2O_3$/glass/$Al_2O_3$ during firing is one of the applicable methods. However, the above proposed glass infiltration method has the problem of the warpage-like delamination. This occurred at the outermost surface of the multiple-bundle substrate. It is thought that the decomposed gas rapidly expands in low viscous glass to create vacant space. To solve this problem, the vacant space was tamped with $Al_2O_3$ particles to lead to the actual improvement of the sintered properties. With 15 wt% of tamping $Al_2O_3$ particles in glass, most of the vacant space disappeared. Fully densified zero-shrinkage substrate without delamination can be obtained.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.30 no.11
• /
• pp.683-687
• /
• 2017

We investigated the structure of an ultra-thin insulating board with low thermal conductivity along z-axis, which was based on the idea of void layers created during the glass infiltration process for the zero-shrinkage low-temperature co-fired ceramic (LTCC) technology. An alumina and four glass powders were chosen and prepared as green sheets by the tape casting method. After comparison of the four glass powders, bismuth glass was selected for the experiment. Since there is no notable reactivity between alumina and bismuth glass, alumina was selected as the supporting additive in glass layers. With 2.5 vol% of alumina powder, glass green sheets were prepared and stacked alternately with alumina green sheet to form the 'alumina/glass (including alumina additive)/alumina' structure. The stacked green sheets were sintered into an insulating substrate. Scanning electron microscopy revealed that the additive alumina formed supporting bridges in void layers. The depth and number of the stacking layers were varied to examine the insulating property. The lowest thermal conductivity obtained was 0.23 W/mK with a $500-{\mu}m-thick$ substrate.

• Transactions on Electrical and Electronic Materials
• /
• v.6 no.6
• /
• pp.256-261
• /
• 2005

This paper presents that the modeling to predict the characteristics with respect to the performance of solenoid embedded inductors manufactured by LTCC process via the nonlinear regression model based on the quasi-Newton method. In order to reduce the runs, the design of experiments (DOE) was used to generate the design space. The nonlinear process models were constructed by the piecewise regression model based on the quasi-Newton method for estimating the model coefficient with the break point on the statistical confidence intervals. Those models were verified by the model accuracy checking based on the assumption statistically.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.15 no.1
• /
• pp.73-80
• /
• 2004

In this paper, the implementation and embedding method of the existing air-filled waveguide-filters at millimeter-wave on general PCB substrate is introduced by systematically inserting the vias inside waveguide and mathematically manipulating the simple equations obtained ken the classical circular-post waveguide filter design. All the metal structures placed vertically such as side wall fur perfect ground plane and circular-post for signal control in the air-filled WR-22 waveguide are replaced with several types of via for constructing the bandpass-filter. Side wall and poles inside waveguide are realized by placing a series array of via and tuning the via diameter. The lengths of x, y, z axis are reduced in proportion to root square of employed substrate dielectric constant and especially the length of z axis can be more reduced due to the characteristics of the wave propagation. Because the mass production on PCB is possible without fabricating a large-scaled metal waveguide of WR-22 as input/output ports at millimeter-wave regime, the manufacturing cost is reduced considerably. Finally, when using multilayer process like LTCC for small-sized module, it is one of advantages to use only one layer f3r the filter fabrication. To evaluate the validity of this novel technique, order-3 Chebyshev BPF(Bandpass-Filter) centered at 40 GHz-band with a 2.5 ％ FBW (Fractional Bandwidth) were used. The employed substrate has relative dielectric constant of 2.2 and thickness of 10 mil of Rogers RT/Duroid 5880. Accroding to design and measurement results, a good performance of insertion loss of 2 ㏈ and return loss of -30 ㏈ is achieved at full input/output ports.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.14 no.10
• /
• pp.1036-1043
• /
• 2003

In this paper, novel lumped equivalent circuits for a conventional parallel directional coupler are proposed. This novel equivalent circuits only have self inductance and self capacitance, so we can design exact lumped equivalent circuit. The equivalent circuit and design formula for the presented lumped element coupler is derived based on the even- and odd-mode properties of a parallel-coupled line. By using the derived design formula, we have designed the 3 dB and 10 dB lumped element directional couplers at the center frequency of 100 MHz and 2 GHz, respectively a chip type directional coupler has been designed with multilayer configurations by employing commercial EM simulator. Designed chip-type directional couplers have a 3 dB-coupling value at the center frequency of 2 GHz and fabricated lumped directional coupler on fr4 organic substrate has a 3 dB, 10 dB-coupling values at the center frequency of 100 MHz. Excellent agreements between simulation results and measurement results on the designed directional couplers show the validity of this paper. Furthermore, in order to adapt to multi-layer process such as Low Temperature Cofired Ceramic (LTCC), chip-type lumped element couplers have been designed by using this method.

• Proceedings of the International Microelectronics And Packaging Society Conference
• /
• 2000.11a
• /
• pp.61-64
• /
• 2000

We fabricated and characterized Low Noise Amplifier (LNA) using MCM-C (Multi-Chip-Module-Cofired) technology for 2.14 GHz IMT-2000 mobile terminal application. First, We designed LNA circuits and simulated it's high frequency characteristics using circuits simulator. For the simulation, we adopted high frequency libraries of all the devices used in LNA samples. By the simulation, Gain was 17 dB and Noise Figure was 1.4 dB. We used multilayer process of LTCC (Low Temperature Co-fired Ceramics) substrate and conductor, resistor pattern for the MCM-C LNA fabrication. We made 2 buried inductors, 2 buried capacitors and 3 buried resistors. The number of the total layers was 6. On the top layer, we patterned microstrip line and pads for the SMT device. We measured the high frequency characteristics, and the results were 14.7 dB Gain and 1.5 dB Noise Figure.

• Proceedings of the Korean Society for Technology of Plasticity Conference
• /
• 2007.05a
• /
• pp.71-74
• /
• 2007

Substitution of the stacked antenna for the normally pressed antenna in the mobile phone was tried for the purpose of decreasing its size. However, reduced size resulted in the difficulties obtaining the targeted characteristics with the bandwidth over 70MHz. The cross-section of the vias in the low temperature co-firing ceramics process was studied to find out effects on the bandwidth characteristics. Circular and rectangular cross-section of the via beneath different types of antenna patterns were simulated. Better bandwidth characteristics were acquired for the larger diameter of the circular section and for the rectangular section as the cross-section area increased. From the viewpoint of the shape of the cross-section, rectangular area showed better characteristics than the circular area with the same longest length in the cross-section.

• ETRI Journal
• /
• v.23 no.1
• /
• pp.23-32
• /
• 2001

Examination of the statistical variation of integrated passive components is crucial for designing and characterizing the performance of multichip module (MCM) substrates. In this paper, the statistical analysis of parallel plate capacitors with gridded plates manufactured in a multilayer low temperature cofired ceramic (LTCC) process is presented. A set of integrated capacitor structures is fabricated, and their scattering parameters are measured for a range of frequencies from 50 MHz to 5 GHz. Using optimized equivalent circuits obtained from HSPICE, mean and absolute deviation is calculated for each component of each device model. Monte Carlo Analysis for the capacitor structures is then performed using HSPICE. Using a comparison of the Monte Carlo results and measured data, it is determined that even a small number of sample structures, the statistical variation of the component values provides an accurate representation of the overall capacitor performance.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2002.07b
• /
• pp.593-596
• /
• 2002

In this paper, the effect of device model parameter variation on three-dimensional embedded passive devices was investigated using statistical analysis. The optimized equivalent circuit models for several different structures were obtained from HSPICE simulation. The mean and the standard deviation of model parameters were extracted and the sensitivity analysis for each component was performed. From the analysis, the performance and parametric yield of the devices can be analyzed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2003.07b
• /
• pp.669-672
• /
• 2003

With the advances on wireless internet technology, many research on minimization of wireless LAN is on the progress. To apply passive components in MCM, characteristic analysis of passive components is essential. In this paper, three square spiral inductors were modeled by HSPICE using PEEC (Partial Element Equivalent Circuit) method. Afterwards, Monte-Carlo analysis was performed to evaluate the optimized parameters. This work will give an idea on PEEC modeling of spiral inductor, and enable researchers with predictive data before large scale manufacturing.