• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.575-578
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• 2005

We report on a low-cost V-band wireless transceiver with no use of any local oscillator in the receiver block using a self-heterodyne architecture. V-band Microwave monolithic IC (MMIC) modules were developed to demonstrate the wireless transceiver using coplanar waveguide (CPW) and GaAs PHEMT technologies. The MMIC modules such as the MMIC low noise amplifier (LNA), medium power amplifier (MPA) and the up/down-mixer were installed in the transceiver system. To interface the MMIC chips with the component modules for the transceiver system, CPW-to-waveguide fin-line transition modules of WR-15 type were designed and fabricated. The fabricated LNA modules showed a $S_{21}$ gain of 8.4 dB and a noise figure of 5.6 dB at 58 GHz. The MPA modules exhibited a gain of 6.9 dB and a $P_1$ $_{dB}$ of 5.4 dBm at 58 GHz. The conversion losses of the up-mixer and the down-mixer module were 14.3 dB at a LO power of 15 dBm, and 19.7 dB at a LO power of 0 dBm, respectively. From the measurement of V-band wireless transceiver, a conversion gain of 0.2 dB and a P $_{1dB}$ of 5.2 dBm were obtained in the transmitter block. The receiver block showed a conversion gain of 2.1 dB and a P $_{1dB}$ of -18.6 dBm. The wireless transceiver system demonstrated a successful data transfer within a distance of 5 meters.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.3
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• pp.210-219
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• 2005

We report on a low-cost V-band wireless transceiver with no use of any local oscillator in the receiver block using a self-heterodyne architecture. V-band millimeter-wave monolithic IC (MMIC) modules were developed to demonstrate the wireless transceiver using coplanar waveguide (CPW) and GaAs PHEMT technologies. The MMIC modules such as the MMIC low noise amplifier (LNA), medium power amplifier (MPA) and the up/down-mixer were installed in the transceiver system. To interface the MMIC chips with the component modules for the transceiver system, CPW-to-waveguide fin-line transition modules of WR-15 type were designed and fabricated. The fabricated LNA modules showed a $S_{21}$ gain of 8.4 dB and a noise figure of 5.6 dB at 58 GHz. The MPA modules exhibited a gain of 6.9 dB and a $P_{1dB}$ of 5.4 dBm at 58 GHz. The conversion losses of the up-mixer and the down-mixer module were 14.3 dB at a LO power of 15 dBm, and 19.7 dB at a LO power of 0 dBm, respectively. From the measurement of V-band wireless transceiver, a conversion gain of 0.2 dB and a $P_{1dB}$ of 5.2 dBm were obtained in the transmitter block. The receiver block showed a conversion gain of 2.1 dB and a $P_{1dB}$ of -18.6 dBm. The wireless transceiver system demonstrated a successful data transfer within a distance of 5 meters.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.5C
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• pp.522-529
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• 2002

MMIC circuits in whole receiver system was fabricated based on GaAs pHEMT technology. And a V-band downconverter module was fabricated by integrating these circuits. The downconverter module consists of a LO drive power amplifier which generates 24dBm output power, a low noise amplifier(LNA) which shows 20 dB small signal gain, an active parallel feedback oscillator which generates 1.6 dBm output power, and a cascode mixer which shows over 6dB conversion gain. The good conversion gain performance of our mixer made no need to attach any IF amplifier which grows conversion gain. Measured results of the complete downconverter show a conversion gain of over 20 dB between 57.5 GHz and 61.7GHz without IF amplifier.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.3
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• pp.1-7
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• 1999

A single RF transceiver evaluation board have been developed for the purpose of application to the 900MHz band transceiver contained RF-IC chip And environment test was evaluated. The RF-IC chipset includes LNA(Low Noise Amplifier), down-conversion mixer, AGC(Automatic Gain Controller), switched capacitor filter and down sampling mixer. The RF evaluation board for the testing of chipset contained various external matching circuits, filters such as RF/IF SAW(Surface Acoustic Wave) filter and duplexer and power supply circuits. With the range of 2.7~3.3V the operated chip revealed moderate power consumption of 42mA. The chip was well operated at the receiving frequency of 925~960MHz. Measurement result is similar to general RF receiving specification of the 900MHz digital mobile phone.

• ETRI Journal
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• v.29 no.4
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• pp.421-429
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• 2007

This paper presents a direct-conversion CMOS transceiver for fully digital DS-UWB systems. The transceiver includes all of the radio building blocks, such as a T/R switch, a low noise amplifier, an I/Q demodulator, a low pass filter, a variable gain amplifier as a receiver, the same receiver blocks as a transmitter including a phase-locked loop (PLL), and a voltage controlled oscillator (VCO). A single-ended-to-differential converter is implemented in the down-conversion mixer and a differential-to-single-ended converter is implemented in the driver amplifier stage. The chip is fabricated on a 9.0 $mm^2$ die using standard 0.18 ${\mu}m$ CMOS technology and a 64-pin MicroLead Frame package. Experimental results show the total current consumption is 143 mA including the PLL and VCO. The chip has a 3.5 dB receiver gain flatness at the 660 MHz bandwidth. These results indicate that the architecture and circuits are adaptable to the implementation of a wideband, low-power, and high-speed wireless personal area network.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.615-616
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• 2006

Nowadays, the need of multi-mode/multi-band transceiver is rapidly increasing, so we design a direct conversion RF front-end for multi-mode/multi-band receiver that support WCDMA/CDMA2000/WIBRO standard. It consists of variable gain reconfigurable LNA and single input double balanced Mixer and complementary differential LC Oscillator. The circuit is implemented in 0.18 um RF CMOS technology and is suitable for low-cost mode/multi-band.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2002.11a
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• pp.69-73
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• 2002

We have designed and fabricated a low-cost, V-band CPW receiver chip set using GaAs PHEMT technology for the application of millimeter-wave wireless communication systems. Low noise amplifiers and down-converters were developed for this chip set. The fabricated low noise amplifier showed an S$\sub$21/ gain of 14.9 ㏈ at 60 ㎓ and a noise figure of 4.1 ㏈ at 52 ㎓. The down-converter exhibited a high conversion gain of 2 ㏈ at the low LO Power of 0 ㏈m. This work demonstrates that the GaAs PHEMT technology is a viable low-cost solution for V-band applications.

• Journal of Advanced Navigation Technology
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• v.1 no.1
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• pp.23-34
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• 1997

A multi-channel digital GPS receiver has been developed including a RF-to-IF engine (engine 1), a digital signal processing engine (engine 2) with a microprocessor interfacing, and a navigation software. A high speed SiGe heterojunction bipolar transistor (HBT) as a active device has been mounted on chip-on-board (COB) type hybrid ICs such as LNA, mixer, and VCO in RF front-end of the engine 1 board. A 6-channel digital correlator together with a real-time clock and a microprocessor interface has been realized using an Altera Flex 10K FPGA as well as ASIC technology. Navigation software controlling the correlator for GPS signal tracking, retrieval and storing a message retrieval, and position calculation has been implemented. The GPS receiver was tested using a single channel STR2770 simulator. Successful navigation message retrieval and position determination was confirmed.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.1
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• pp.126-142
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• 2016

This paper presents a wide-frequency-range, low-power transceiver with an automatic impedance-matching calibration for TV-white-space (TVWS) application. The wide-range automatic impedance matching calibration (AIMC) is proposed for the Drive Amplifier (DA) and LNA. The optimal $S_{22}$ and $S_{11}$ matching capacitances are selected in the DA and LNA, respectively. Also, the Single Pole Double Throw (SPDT) switch is integrated to share the antenna and matching network between the transmitter and receiver, thereby minimizing the systemic cost. An N-path filter is proposed to reject the large interferers in the TVWS frequency band. The current-driven mixer with a 25% duty LO generator is designed to achieve the high-gain and low-noise figures; also, the frequency synthesizer is designed to generate the wide-range LO signals, and it is used to implement the FSK modulation with a programmable loop bandwidth for multi-rate communication. The TVWS transceiver is implemented in $0.13{\mu}m$, 1-poly, 6-metal CMOS technology. The die area of the transceiver is $4mm{\times}3mm$. The power consumption levels of the transmitter and receiver are 64.35 mW and 39.8 mW, respectively, when the output-power level of the transmitter is +10 dBm at a supply voltage of 3.3 V. The phase noise of the PLL output at Band 2 is -128.3 dBc/Hz with a 1 MHz offset.

• Journal of Digital Convergence
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• v.10 no.10
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• pp.313-318
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• 2012

In this study, we propose a low-noise transceiver for 10GHz motion sensor. The transceiver presented here has a circuit(Hittite HMC908LC5) that is composed of a two way-$0^{\circ}$ power splitter(the 1:2 block) and a $90^{\circ}$ Hybrid. The noise reduction circuit utilizes an LNA followed by an image reject mixer which is driven by an LO buffer amplifier. A modeling and analysis have been pursued using CST MWS. A prototype sensor was manufactured to measure the performance and experimental results show that the proposed sensor is good enough to use for a accurate motion sensor.