• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.97-98
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• 2006

For high performance transistor in the 0.14um generation, high speed sram is using a weak region of SCE(Short Channel Effect). It causes serious SCE problem (Vth Roll-Off and Punch-Through etc). This paper shows improvement of Vth roll-off and Ion/Ioff characteristics through high concentration Pocket implant, LDD(Light Dopped Dram) and low energy Implant to reduce S/D Extension resistance. We achieve stabilized Vth and Improved transistor Ion/Ioff performance of 10%.