• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.24 no.2
• /
• pp.139-145
• /
• 2024

This paper presents the design of a voltage controlled oscillator (VCO) which is one of the key building blocks in modern wireless communication systems with small VCO gain (K_vco) variation. To compensate conventional large K_vco variation, a series varactor bank has been added to the conventional LC-tank with parallel capacitor bank array. And also, in order to achieve excellent phase noise performance while maintaining wide tuning range, a mixed coarse/fine tuning scheme(series varactor array and parallel capacitor array) is chosen. The switched varactor array bank is controlled by the same digital code for switched capacitor array without additional digital circuits. For use at a low voltage of 1.2V, the proposed current reference circuit in this paper used a current reference circuit for safety with the common gate removed more safely. Implemented in a TSMC 0.13㎛ CMOS RF technology, the proposed VCO can be tuned from 4.4GH to 5.3GHz with the K_vco (VCO gain ) variation of less than 9.6%. While consuming 3.1mA from a 1.2V supply, the VCO has -120dBc/Hz phase noise at 1MHz offset from the carrier of the 5.3 GHz.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.51 no.3
• /
• pp.55-60
• /
• 2014

For an high speed communication, a 40GHz VCO was implemented using a 0.11um standard CMOS technology. The mm-wave VCO was designed by a LC type using a spiral inductor, and a simplified architecture with buffers and a smart biasing technique were used to get a high performance. The frequency range of the proposed VCO is 34~40GHz which is suitable for mm-Wave communication system. It has an output power of -16dBm and 16% tuning range. And the phase noise is -100.33dBc/Hz at 1MHz offset at 38GHz fundamental frequency. The total power consumption of VCO including PADs is 16.8mW with 1.2V supply voltage. The VCO achieves the FOMT of -183.8dBc/Hz which is better than previous VOCs.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.9 no.2
• /
• pp.301-306
• /
• 2005

In this paper, a gain-boosting charge pump(CP) and a latch type voltage controlled oscillato.(VCO) with voltage controlled resistor(VCR) were proposed. The gain-boosting CP achieves good .current matching of less than 11$mu$V voltage difference between 43$mu$V and 32$mu$V in its output range from 0.8V to 2.3V. The VCO with VCR shows good linear characteristics over the range from 1V to 3V. The fabricated VCO exhibits -108dBc/Hz phase noise at a 100kHz and is comparable to that of the integrated LC-tank oscillator. The phase locked loop(PLL) with new circuits was simulated in a 0.35$mu$m CMOS process and showed 150$mu$s locking time.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.18 no.2 s.117
• /
• pp.213-218
• /
• 2007

In this paper, we propose the design and fabrication on high frequency CMOS VCO for DS-UWB(Direct-Sequence Ultra-WideBand) applications using 0.18 ${\mu}m$ process. The complementary cross-coupled LC oscillator architecture which is composed of PMOS, NMOS symmetrically, is designed for improving the phase noise characteristic. The resistor is used instead of current source that reduce the 1/f noise of current source. The high-speed buffer is needed for measuring the output characteristic of VCO using spectrum analyzer, therefore the high-speed inverter buffer is designed with VCO. A fabricated core VCO size is $340{\mu}m{\times}535{\mu}m$. The VCO is tunable between 7.09 and 7.52 GHz and has a phase noise lower than -107 dBc/Hz at 1-MHz offset over entire tuning range. The measured harmonic suppression is 32 dB. The VCO core circuit draws 2.0 mA from a 1.8 V supply.

• Proceedings of the KIPE Conference
• /
• 1999.07a
• /
• pp.581-584
• /
• 1999

본 논문에서는 12펄스 위상제어 정류기 및 수동 필터와 능동필터로 구성된 KCCH 싸이클로트론 전자석용 고정밀, 고안정 전류 전원장치를 위한 각 구성 부분의 제어 및 설계 특징은 다음과 같다. 12펄스 싸이리스터 컨버터의 출력전압 제어를 위하여 아날로그 phase-locked oscillator 점호방식과 함께 부하에 비해 빠른 동특성을 가지는 내부 전압제어 루프를 구성하여, 입력전원과 변압기의 불평형에 의해 발생하는 저차고조파를 줄어들게 하였다. LC 수동필터와 MOSFET으로 구성된 능동필터를 직렬로 연결하여 출력전압 리플을 허용치 이하로 낮추었다. 12펄스 컨버터 출력전압 리플의 최대 peak-to-peak값이 0.1% 이하가 되도록 수동필터 값을 설계하였으며 설계과정을 제시하였다. 16bit D/A와 A/D에 의해 디지털로 제어되는 pass bank MOSFET 레귤레이터는 출력리플의 slow drift 제어와 설정치 값의 정확한 제어를 가능하게 한다. 또한 MOSFET는 전압 구동형 소자이며 turn-on 전류 도통 시에 양의 저항계수를 갖기 때문에, 첫째 전류 구동소자에 비해 간단한 구동회로를 가지며, 둘째 소자의 병렬 연결이 용이하다는 이점을 갖는다. 본 논문에서는 전류 전원장치 각 부분의 설계에 대하여 상세한 설계결과를 제시하며, 실험결과를 통하여 제안된 설계방식의 우수한 정적 및 동적 특성을 입증한다.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.15 no.5
• /
• pp.437-444
• /
• 2015

In simulation-based circuit optimization, many simulation runs may be wasted while evaluating infeasible designs, i.e. the designs that do not meet the constraints. To avoid such a waste, this paper investigates the use of support vector machine (SVM) classifiers in predicting the design's feasibility prior to simulation and the optimal selection of the SVM parameters, namely, the Gaussian kernel shape parameter ${\gamma}$ and the misclassification penalty parameter C. These parameters affect the complexity as well as the accuracy of the model that SVM represents. For instance, the higher ${\gamma}$ is good for detailed modeling and the higher C is good for rejecting noise in the training set. However, our empirical study shows that a low ${\gamma}$ value is preferable due to the high spatial correlation among the circuit design candidates while C has negligible impacts due to the smooth and clean constraint boundaries of most circuit designs. The experimental results with an LC-tank oscillator example show that an optimal selection of these parameters can improve the prediction accuracy from 80 to 98% and model complexity by $10{\times}$.

• Proceedings of the IEEK Conference
• /
• 2002.07b
• /
• pp.1312-1315
• /
• 2002

This research describes the design of a fully integrated fractional-N frequency synthesizer intended for the local oscillator in IMT-2000 system using 0.18-$\mu\textrm{m}$ CMOS technology and 1.8-V single power supply. The designed fractional-N synthesizer contains following components. Modified charge pump uses active cascode transistors to achieve the high output impedance. A multi-modulus prescaler has modified ECL-like D flip-flop with additional diode-connected transistors for short transient time and high frequency operation. And phase-frequency detector, integrated passive loop filter, LC-tuned VCO having a tuning range from 1.584 to 2.4 ㎓ at 1.8-V power supply, and higher-order sigma-delta modulator are contained. Finally, designed frequency synthesizer provides 5 ㎒ channel spacing with -122.6 dBc/Hz at 1 ㎒ in the WCDMA band and total output power is 28 mW.

• Proceedings of the KIEE Conference
• /
• 2008.07a
• /
• pp.1399-1400
• /
• 2008

본 논문에서는 TSMC 0.18um 공정을 이용하여 2.45GHz 대역에서 동작하는 RFID 리더에 적용 할 수 있는 전압제어 발진기를 설계하였다. 위상 잡음 특성 향상을 위해 PMOS, NMOS 소자를 대칭으로 구성한 complementary cross-coupled LC 발진기 구조로 설계 하였고 MOS 배렉터를 이용하여 주파수를 가변 하였다. 또한 공정에서 사용되는 인덕터에 차폐 도체면(PGS:Patterned Ground Shield) 구조를 삽입했을 때 인덕터의 품질계수가 약 5.82% 향상되었고. 이에 따른 위상 잡음은 1MHz offset 주파수에서 PGS를 삽입하지 않는 구조에서는 -102.666dBc/Hz 이며, PGS 구조를 삽입한 구조는 -104.328dBc/Hz로 약1.662dBc 정도의 성능이 향상 되었다. 전압제어 발진기 Core 사이즈는 900um ${\times}$ 590um이고 주파수 가변 범위는 배렉터 전압 1.2${\sim}$2.1V에서 249MHz로 11.4% 특성을 보였다. 1.8V공급전압에서 5.76mW의 전력소모를 보였다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2013.05a
• /
• pp.760-761
• /
• 2013

본 논문은 차량 추돌 예방 레이더용 24GHz 전압제어발진기를 제안한다. 이러한 회로는 TSMC $0.13{\mu}m$ 혼성신호/고주파 CMOS 공정($f_T/f_{MAX}=120/140GHz$)으로 설계되어 있다. 이러한 회로는 스위치형 공진기 (switched resonator)의 기본 구조를 지닌 24GHz 주파수 대역을 사용할 수 있도록 CMOS LC 튜닝 회로를 포함하고 있다. 특히 전체 칩 면적을 줄이기 위해 수동형 인덕터 대신 능동형 인덕터부를 사용하였다. 본 연구에서 개발한 발진기는 전체 튜닝 범위에 대해 24GHz에서 8%의 측정결과를 보였으며, 600kHz 오프셋에서 24GHz에 대해 약 -89dBc/Hz의 우수한 위상 잡음 특성을 보였다.

• Proceedings of the KIEE Conference
• /
• 2006.07b
• /
• pp.988-989
• /
• 2006

The ultrasonic welding is with features of high electric conductivity and hot conductivity when it is used in metallic bond, high electric conductivity and hot conductivity when it is used in various metallic bonds, excellent quality when it is used for advanced junction, easiness when it is used in various metallic bonds, being needless for the exhaustive material and being benefit for the environment. Currently the use of ultrasonic welding is increasing in the industrial fields such as the automobile battle, the refrigerator, the air conditioner, the battery and the solar cell junction. But the production ability is insufficient in our country and it is necessary to explore the core technology of the ultrasonic welding. In this paper, the output LC resonance filter and 35kHz squal wave onion occurrence Full Bridge plans was designed. The output examination of the ultrasonic oscillator and the ultrasonic welding examination were done. The method for getting more smooth result in the ultrasonic welding machine system was researched.