• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.413-414
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• 2008

A 2.4 GHz low phase noise fully integrated LC voltage-controlled oscillator (VCO) in $0.18\;{\mu}m$ CMOS technology is presented in this paper. The VCO is optimized based on phase noise reduction. The design of the VCO uses differential varactors which are adopted for symmetry of the circuit, and consider AM-PM conversion due to a cross-coupled pair. The VCO is designed to draw 3 mA from 1.8 V supply voltage. Simulated phase noise is -137.3 dBc/Hz at 3 MHz offset. The tuning range is found to be 300 MHz range from 2.3 GHz to 2.6 GHz.

• ETRI Journal
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• v.34 no.4
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• pp.518-526
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• 2012

This paper proposes LC voltage-controlled oscillator (VCO) phase-locked loop (PLL) and ring-VCO PLL topologies with low-phase noise. Differential control loops are used for the PLL locking through a symmetrical transformer-resonator or bilaterally controlled varactor pair. A differential compensation mechanism suppresses out-band spurious tones. The prototypes of the proposed PLL are implemented in a CMOS 65-nm or 45-nm process. The measured results of the LC-VCO PLL show operation frequencies of 3.5 GHz to 5.6 GHz, a phase noise of -118 dBc/Hz at a 1 MHz offset, and a spur rejection of 66 dBc, while dissipating 3.2 mA at a 1 V supply. The ring-VCO PLL shows a phase noise of -95 dBc/Hz at a 1 MHz offset, operation frequencies of 1.2 GHz to 2.04 GHz, and a spur rejection of 59 dBc, while dissipating 5.4 mA at a 1.1 V supply.

• KIEE International Transactions on Electrophysics and Applications
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• v.2C no.6
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• pp.292-296
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• 2002

A new sustain driving method for the AC PDP is presented. In this driving method, the voltage source is connected to a storage capacitor, this storage capacitor charges an intermediate capacitor through LC resonance, and the panel is charged from the intermediate capacitor indirectly. In this way, the current flowing into the AC PDP when the sustain discharge occurs is reduced because the current is indirectly supplied from a capacitor, a limited source of charge. Thus, the input power to the output luminance efficiency is improved. Since the voltage supplied to the storage capacitor is doubled through LC resonance, this method call drive an AC PDP with a voltage source of about half of the voltage necessary in the conventional driving methods. The experiments showed that this charge-controlled driving method could drive ail AC PDP with a voltage source of as low as 107V. Using a panel of the conventional structure, luminous efficiency of 1.28 lm/W was achieved.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.501-503
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• 2008

This paper presents the design of a 2.4 GHz low phase noise fully integrated LC Voltage-Controlled-Oscillator (VCO) in $0.18{\mu}m$ CMOS technology. The VCO is without any tail bias current sources for a low phase noise and, in which differential varactors are adopted for the symmetry of the circuit. At the same time, the use of differential varactors pairs reduces the tuning range, i.e., the frequency range versus VTUNE, so that the phase noise becomes lower. The simulation results show the achieved phase noise of -138.5 dBc/Hz at 3 MHz offset, while the VCO core draws 3.9mA of current from a 1.8V supply. The tuning range is from 2.28GHz to 2.55 GHz.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.16 no.6
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• pp.201-204
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• 2007

In this paper, fully embedded and miniaturized diplexer device has been developed and characterized for dual-band/mode CDMA handset applications. The size of the embedded diplexer is significantly reduced by embedding high Q circular spiral inductors and high DK MIM capacitors into a low cost organic package substrate. The fabricated diplexer has insertion losses and isolations of -0.5 and -23 dB at 824-894 MHz and -0.7 and -22 dB at 1850-1990 MHz, respectively. Its size is $3.9mm{\times}3.9mm{\times}0.77mm$. The fabricated diplexer is the smallest one which is fully embedded into a low cost organic package substrate.

• Journal of Electrical Engineering and Technology
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• v.13 no.1
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• pp.220-225
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• 2018

A class E power oscillator is demonstrated for 6.78-MHz wireless power transfer system. The oscillator is designed with a class E power amplifier to use an LC feedback network with a high-Q inductor between the input and the output. Multiple capacitors are used to minimize the variation of the oscillation frequency by capacitance tolerance. The gate and drain bias voltages with opposite characteristics to make the frequency shift of the oscillator are connected in a resistance distribution circuit located at the output of the low drop-out regulator and supplied bias voltages for class E operation. The measured output of the class E power oscillator, realized using the co-simulation, shows 9.2 W transmitted power, 6.98 MHz frequency and 86.5% transmission efficiency at the condition with 20 V $V_{DS}$ and 2.4 V $V_{GS}$.

• Proceedings of the KIEE Conference
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• 2003.07b
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• pp.1235-1237
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• 2003

For small capacity rectifier circuits as these for consumer electronics and appli capacitor input type rectifier circuits are gen used. Consequently. various harmonics gen within the power system become a serious pro Various studies of this effect have been pres previously. However. most of these employ swit devices, such as FETs and the like. The absen switching devices makes systems more toleran over -load, and brings low radio noise benefits propose a power factor correction scheme using resonant in commercial frequency without swit devices. In this method. It makes a sinusoidal by widening conduction period using the cu resonance in commercial frequency. Hence, harmonic characteristics can be significantly imp where the lower order harmonics. such as the and seventh orders are much reduced. The resu confirmed by the theoretical and experm implementations.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.5
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• pp.437-444
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• 2015

In simulation-based circuit optimization, many simulation runs may be wasted while evaluating infeasible designs, i.e. the designs that do not meet the constraints. To avoid such a waste, this paper investigates the use of support vector machine (SVM) classifiers in predicting the design's feasibility prior to simulation and the optimal selection of the SVM parameters, namely, the Gaussian kernel shape parameter ${\gamma}$ and the misclassification penalty parameter C. These parameters affect the complexity as well as the accuracy of the model that SVM represents. For instance, the higher ${\gamma}$ is good for detailed modeling and the higher C is good for rejecting noise in the training set. However, our empirical study shows that a low ${\gamma}$ value is preferable due to the high spatial correlation among the circuit design candidates while C has negligible impacts due to the smooth and clean constraint boundaries of most circuit designs. The experimental results with an LC-tank oscillator example show that an optimal selection of these parameters can improve the prediction accuracy from 80 to 98% and model complexity by $10{\times}$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.05c
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• pp.55-58
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• 2001

In this paper, we present the results of the design and fabrication of the VCO(Voltage controlled Oscillator) using RF circuit simulator GENESYS and electromagnetic field simulator EMpower Frequency range is fabricated VCO is 850 MHz ~ 950 MHz, which is used Colpitts Circuit. the fabricated VCO is consisted of resonator, oscillator and MSL(Microstrip Line) is used in LC tuning circuit.(operated by negative feedback) MSL(Microstrip Line), Varactor(Plastic package), low noise TR(SOT-23), chip inductor(1608), chip capacitor(1005), chip resistance(1005). 1005 type is used for sample fabrication of VCO. In the fabrication process, circuit pattern is screen printed on the alumina substrates of over 99.9% purity. Center frequency of the sample VCO is 850MHz at $V_T=1.5V$, while the simulated value was 1.0GHz at $V_T=1.5V$. Variable frequency range of the sample is 860~950MHz in contrast to the 1068~1100MHz of the simulated values.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.05c
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• pp.153-156
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• 2001

In this paper, we present the results of the design and fabrication of the VCO(Voltage controlled Oscillator) using RF circuit simulator GENESYS and electromagnetic field simulator EMpower Frequency range is fabricated VCO is 850 MHz ~ 950 MHz, which is used Colpitts Circuit. the fabricated VCO is consisted of resonator, oscillator and MSL(Microstrip Line) is used in LC tuning circuit.(operated by negative feedback) MSL(Microstrip Line), Varactor(Plastic package), low noise TR(SOT-23), chip inductor(1608), chip capacitor(1005), chip resistance(1005). 1005 type is used for sample fabrication of VCO. In the fabrication process, circuit pattern is screen printed on the alumina substrates of over 99.9% purity. Center frequency of the sample VCO is 850MHz at $V_T$=1.5V, while the simulated value was 1.0GHz at $V_T$=1.5V. Variable frequency range of the sample is 860~950MHz in contrast to the 1068~1100MHz of the simulated values.