• Journal of Research and Publication Ethics
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• v.1 no.1
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• pp.23-28
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• 2020

Purpose: Focusing on Supreme Court precedents, we intend to establish criteria for judging research misconduct. Research design, data and methodology: In addition, I would like to propose the criteria for judging research misconduct by the KODISA, which applies the court's standards well in practice, and guidelines for preventing research misconduct. Research design, data and methodology: After classifying the case of research misconduct into six cases, the court's judgment and practical application will be reviewed. Results: First, research misconduct that has passed the disciplinary prescription can be punished. This is because the state of illegality continues to this day. Second, even if there were no punishment regulations at the time of research misconduct, it can be retroactively punished with the current punishment regulations. This is because research ethics is a universal and common standard and does not change. Third, if there is a fact that infringes on intellectual property rights, it is presumed unwritten intentions. Therefore, the act of taking and using the work of another person without permission or proper citation procedure, even if it is unintentional and for the public interest, is a research misconduct. Fourth, if there is an inappropriate citation notation, the intention of research misconduct is presumed. It is the judgment of the court that even if a quotation is marked, if it is incomplete, it is recognized as plagiarism. Fifth, if the author uses the work of another person without proper source indication, it is plagiarism even if the other person who owns the copyright agrees to it. The understanding or consent of some parties does not justify research misconduct in violation of public trust. Sixth, it is a research misconduct to create a new work without citations for one's previous work. In addition, even if there is a citation, if the subsequent writing is not original, it is a research misconduct. Conclusions: Academia should clarify the scope of research misconduct by referring to the Research Ethics Regulations of KODISA, and deal with research results that lack the value as creative works similar to those of research misconduct.

• The Journal of the Korea Contents Association
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• v.7 no.4
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• pp.199-205
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• 2007

Most of information and communication assistance machinery and tools for disorder people of Occupied are machinery and tools for a visual impairment person and software, The things which can apply to only a specification disorder type and a specification disorder part are most, A special keyboard or a special mouse device of the handicapped person that disorder rank is comparatively the hardness makes the mainstream. It is reported in diffusion rate being very low if I compare this with total disorder population. I study new 1 plan which it can be applied to various disorder types and disorder parts through an intelligent special input device in a study of a book and, I designed this at the real standard that I could manufacture and incarnated it. In addition, I suggested this in a base for a design of a universal supporting input device and suggestion for the side of incarnation plan and a future study direction.

• The Journal of the Korea Contents Association
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• v.15 no.8
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• pp.37-45
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• 2015

With advancement in information technologies and a better mobile environment, the paradigm of service is shifting again from web portals to networked-applications based on individual application programs. Furthermore, as more investment is being made in R&D, the efforts to enhance R&D productivity are becoming important. In this paper, we designed a personalized service model for developing a tool to assist researchers in their R&D activities. To do this, we first compared services and tools in terms of information activities of researchers in R&D. In addition, we also analyzed changes of information environment such as open expansion of information and data, enhancement of personal information protection, popularization of social networking service, very big contents, advances in web platform technology in terms of personalization, and defined some directions of developing a personalized service. Subsequently we designed a personalized service model of research support tool in the views of functions, contents, operation, and defined personalized design goals and principles for implementing it as standard, participation, and open.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.4
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• pp.887-894
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• 2009

Recently many companies has implied the measurement system to measure the organizational and personal performance. For that purpose the measurement system based on Balanced Scorecard(BSC) is broadly implemented. For the successful and effective measurement of performance measurement the design of measurement methodology and indicators should be carried out by experts in this field, and "the objectivity" should be kept in the whole process. But due to the financial difficulties many of the companies have relied on the standard (performance measurement) software, which is avaliable in the market. In this paper the performance measurement. Indicators has been presented for the small and medium sized manufacturing company. As the result of this research the presented performance measurement indicators for administration, operation and R&D part are statistically verified as it is effective.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.4
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• pp.1222-1228
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• 2010

This paper presents a design of the CMOS LDO regulator with a fast transient response for a high speed PMIC(power management integrated circuit). Proposed LDO regulator circuit consists of a reference voltage circuit, an error amplifier and a power transistor. 2-stage wide-band OTA buffer between error amplifier and power transistor is added for a good output stability. Although conventional source follower buffer structure is simple, it has a narrow output swing and a low S/N ratio. In this paper, we use a 2-stage wide-band OTA instead of source follower structure for a buffer. From HSPICE simulation results using a $0.5{\mu}m$ CMOS standard technology, simulation results were 16 mV/V line regulation and 0.007 %/mA load regulation.

• Journal of Satellite, Information and Communications
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• v.11 no.3
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• pp.65-71
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• 2016

Currently developing the OBC of the next-generation LEO satellite by Korea Aerospace Research Institute adopts the LEON2-FT/AT697F processor to achieve high performance. And various communication devices such as SpaceWire, MIL-STD-1553B, DMAUART and CAN Master are integrated to the separated standard communication FPGAs within the OBC, where they can be controlled by the processor and flight software (FSW) through PCI interface. The Actel 1553BRM IP core is used for the 1553B in the next-generation LEO OBC and the B1553BRM wrapper from Aeroflex Gaisler is used for connecting it to the AMBA bus in FPGA. This paper presents the design and development of PCI-based 1553B communication software, and describes the handling mechanism of 1553B operation in FSW task level. Also it shows the test results on real-hardware and simulator.

• Journal of Korea Multimedia Society
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• v.12 no.2
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• pp.200-208
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• 2009

JBIG2, as the next generation standard for binary image compression, must be designed in hardware modules for the JBIG2 FAX to be implemented in an embedded equipment. This paper proposes a hardware module of the high-speed Huffman coder for JBIG2. The Huffman coder of JBIG2 uses selectively 15 Huffman tables. As the Huffman coder is designed to use minimal data and have an efficient memory usage, high speed processing is possible. The designed Huffman coder is ported to Virtex-4 FPGA and co-operating with a software modules on the embedded development board using Microblaze core. The designed IP was successfully verified using the simulation function test and hardware-software co-operating test. Experimental results shows the processing time is 10 times faster than that of software only on embedded system, because of hardware design using an efficient memory usage.

• The Journal of the Korea Contents Association
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• v.3 no.3
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• pp.40-46
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• 2003

In the paper, designed digital contents security module to check unlawfulness reproduction and distribution of digital contents. This paper applied Diffie-Hellman algorithm that use discrete logarithm and random number as primary for public key application to create encryption key that agree each other through communication channel between DCPS and HOST, and applied Triple DES repeat DES 3 times through 2 different encryption key that is selecting ANSI X9.17 that is key management standard, ISO 8732 and PEM(Privacy-Enhanced Mail) etc. by secondary protection for safe transmission of digital contents in transmission line. Designed security module consist of key exchange module, key derivation module and copy protection processing module. Digital contents security module that design in this thesis checks reproduction and distribution of digital contents by unauthenticated user through user certification function and digital contents encryption function, and protect digital contents transmission line.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.3
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• pp.585-593
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• 2017

In this paper, we propose a deblocking filter hardware architecture for low-power HEVC (High-Efficiency Video Coding) in-loop for mobile systems. HEVC performs image compression on a block-by-block basis, resulting in blockage of the image due to quantization error. The deblocking filter is used to remove the blocking phenomenon in the image. Currently, UHD video service is supported in various mobile systems, but power consumption is high. The proposed low-power deblocking filter hardware structure minimizes the power consumption by blocking the clock to the internal module when the filter is not applied. It also has four parallel filter structures for high throughput at low operating frequencies and each filter is implemented in a four-stage pipeline. The proposed deblocking filter hardware structure is designed with Verilog HDL and synthesized using TSMC 65nm CMOS standard cell library, resulting in about 52.13K gates. In addition, real-time processing of 8K@84fps video is possible at 110MHz operating frequency, and operation power is 6.7mW.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.3
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• pp.594-600
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• 2017

This paper proposes a global search based motion estimation algorithm for high performance HEVC encoder and its hardware architecture. To eliminate temporal redundancy, motion estimation in HEVC inter-view prediction uses global search and fast search algorithm to search for a predicted block having a high correlation with the current PU in an interpolated reference picture. The global search method predicts the motion of all candidate blocks in a given search area, thus ensuring optimal results, but has a disadvantage of large computation time. Therefore we propose a new algorithm that reduces computational complexity by reusing SAD operation in global search to reduce computation time of inter prediction. As a result of applying the proposed algorithm to standard software HM16.12, the computation time was reduced by 61%, BDBitrate by 11.81%, and BDPSNR by about 0.5% compared with the existing search algorithm. As a result of hardware design, the maximum operating frequency is 255 MHz and the total number of gates is 65.1K.