• Title/Summary/Keyword: Koblitz curve

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Development of Hardware Modules for Elliptic Curve Cryptosystems based on Binary Field and Optimal Extension Field (이진체와 확장체에 기반한 타원곡선 암호시스템의 하드웨어 모듈 개발)

  • 전향남;정필규;김동규
    • Proceedings of the Korea Multimedia Society Conference
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    • 2003.11a
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    • pp.158-161
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    • 2003
  • 1985년 N. Koblitz와 V. Miller가 각각 독립적으로 제안한 타원곡선 암호시스템(ECC : Elliptic Curve Cryptosystems)은 유한체 위에서 정의된 타원곡선 군에서의 이산대수 어려움에 기초한다. 타원곡선 암호시스템은 다른 공개키 시스템에 비해 보다 짧은 길이의 키만으로도 동일한 수준의 안전도를 유지할 수 있다는 장점으로 인하여, 스마트카드나 모바일 시스템 등에서와 같이 메모리와 처리능력이 제한된 하드웨어에도 이식 가능한 장점이 있다. 본 논문에서는 타원곡선 암호시스템에 필요한 유한체 연산을 이진체(Binary Finite Field)인 GF(2$^{193}$ )과 OEF(Oprimal Extension Field) 상에서 VHDL 언어를 사용하여 구현을 하였고 각 연산의 성능을 비교하였다.

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Scalar Multiplication on Elliptic Curves by Frobenius Expansions

  • Cheon, Jung-Hee;Park, Sang-Joon;Park, Choon-Sik;Hahn, Sang-Geun
    • ETRI Journal
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    • v.21 no.1
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    • pp.28-39
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    • 1999
  • Koblitz has suggested to use "anomalous" elliptic curves defined over ${\mathbb{F}}_2$, which are non-supersingular and allow or efficient multiplication of a point by and integer, For these curves, Meier and Staffelbach gave a method to find a polynomial of the Frobenius map corresponding to a given multiplier. Muller generalized their method to arbitrary non-supersingular elliptic curves defined over a small field of characteristic 2. in this paper, we propose an algorithm to speed up scalar multiplication on an elliptic curve defined over a small field. The proposed algorithm uses the same field. The proposed algorithm uses the same technique as Muller's to get an expansion by the Frobenius map, but its expansion length is half of Muller's due to the reduction step (Algorithm 1). Also, it uses a more efficient algorithm (Algorithm 3) to perform multiplication using the Frobenius expansion. Consequently, the proposed algorithm is two times faster than Muller's. Moreover, it can be applied to an elliptic curve defined over a finite field with odd characteristic and does not require any precomputation or additional memory.

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A fast scalar multiplication on elliptic curves (타원곡선에서 스칼라 곱의 고속연산)

  • 박영호;한동국;오상호;이상진;임종인;주학수
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.12 no.2
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    • pp.3-10
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    • 2002
  • For efficient implementation of scalar multiplication in Kobliz elliptic curves, Frobenius endomorphism is useful. Instead of binary expansion of scalar, using Frobenius expansion of scalar we can speed up scalar multiplication and so fast scalar multiplication is closely related to the expansion length of integral multipliers. In this paper we propose a new idea to reduce the length of Frobenius expansion of integral multipliers of scalar multiplication, which makes speed up scalar multiplication. By using the element whose norm is equal to a prime instead of that whose norm is equal to the order of a given elliptic curve we optimize the length of the Frobenius expansion. It can reduce more the length of the Frobenius expansion than that of Solinas, Smart.

A Hardware Implementation of the Underlying Field Arithmetic Processor based on Optimized Unit Operation Components for Elliptic Curve Cryptosystems (타원곡선을 암호시스템에 사용되는 최적단위 연산항을 기반으로 한 기저체 연산기의 하드웨어 구현)

  • Jo, Seong-Je;Kwon, Yong-Jin
    • Journal of KIISE:Computing Practices and Letters
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    • v.8 no.1
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    • pp.88-95
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    • 2002
  • In recent years, the security of hardware and software systems is one of the most essential factor of our safe network community. As elliptic Curve Cryptosystems proposed by N. Koblitz and V. Miller independently in 1985, require fewer bits for the same security as the existing cryptosystems, for example RSA, there is a net reduction in cost size, and time. In this thesis, we propose an efficient hardware architecture of underlying field arithmetic processor for Elliptic Curve Cryptosystems, and a very useful method for implementing the architecture, especially multiplicative inverse operator over GF$GF (2^m)$ onto FPGA and futhermore VLSI, where the method is based on optimized unit operation components. We optimize the arithmetic processor for speed so that it has a resonable number of gates to implement. The proposed architecture could be applied to any finite field $F_{2m}$. According to the simulation result, though the number of gates are increased by a factor of 8.8, the multiplication speed We optimize the arithmetic processor for speed so that it has a resonable number of gates to implement. The proposed architecture could be applied to any finite field $F_{2m}$. According to the simulation result, though the number of gates are increased by a factor of 8.8, the multiplication speed and inversion speed has been improved 150 times, 480 times respectively compared with the thesis presented by Sarwono Sutikno et al. [7]. The designed underlying arithmetic processor can be also applied for implementing other crypto-processor and various finite field applications.