• Progress in Superconductivity
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• v.13 no.1
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• pp.47-51
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• 2011

Mono-atomic-layer graphene is an interesting system for studying the relativistic carrier transport arising from a linear energy-momentum dispersion relation. An easy control of the carrier density in graphene by applying an external gate field makes the system even more useful. In this study, we measured the Josephson current in a device consisting of mono-layer graphene sheet sandwiched between two closely spaced (~300 nm) aluminum superconducting electrodes. Gate dependence of the supercurrent in graphene Josephson junction follows the gate dependence of the normal-state conductance. The gate-tunable and relatively large supercurrent in a graphene Josephson junction would facilitate our understanding on the weak-link behavior in a superconducting-normal metal-superconducting (SNS) type Josephson junction.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.6
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• pp.709-714
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• 2018

This study researched the reasons for changing polarity in accordance with junction properties in an interface of semiconductors. The contact properties of semiconductors are related to the effect of the semiconductor's device. Therefore, it is an important factor for understanding the junction characteristics in the semiconductor to increase the efficiency of devices. For generation of various junction properties, carbon-doped silicon oxide (SiOC) was deposited with various argon (Ar) gas flow rates, and the characteristics of the SiOC was varied based on the polarity in accordance with the Ar gas flows. Tin-doped zinc oxide (ZTO) as the conductor was deposited on the SiOC as an insulator to research the conductivity. The properties of the SiOC were determined from the formation of a depletion layer by the ionization reaction with various Ar gas flow rates due to the plasma energy. Schottky contact was good in the condition of the depletion layer, with a high potential barrier between the silicon (Si) wafer and the SiOC. The rate of ionization reactions increased when increasing the Ar gas flow rate, and then the potential barrier of the depletion layer was also increased owing to deficient ions from electron-hole recombination at the junction. The dielectric properties of the depletion layer changed to the properties of an insulator, which is favorable for Schottky contact. When the ZTO was deposited on the SiOC with Schottky contact, the stability of the ZTO was improved by the ionic recombination at the interface between the SiOC and the ZTO. The conductivity of ZTO/SiOC was also increased on SiOC film with ideal Schottky contact, in spite of the decreasing charge carriers. It increases the demand on the Schottky contact to improve the thin semiconductor device, and this study confirmed a high-performance device owing to Schottky contact in a low current system. Finally, the amount of current increased in the device owing to ideal Schottky contact.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.11
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• pp.37-47
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• 1997

Utilizing 2-dimensional device simulations incorporating lattic eheating models, we analyzed in detail the DC breakdown characterisics of NMOS trasistors with different structures, which are commonly used as ESD protection transistors. The mechanism leading to device failure resulting from electrostatic discharge was explained by analyzing the 1st and 2nd breakdown characteristics of LDD devices. Also a criteria for more robust designs of NMOS transistor structures against ESD was suggested by examining the characteristics changes with changes in structural parameters such as the LDD doping concentration, the drain junction depth, the distance between source/drain contacts, and the source junction area.

• Progress in Superconductivity
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• v.12 no.2
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• pp.114-117
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• 2011

We report our efforts on the development of Nb-based non-hysteretic Josephson junction fabrication process for quantu device applications. By adopting and modifying the existing Nb-aluminum oxide tunnel junction process, we develop a process for non-hysteretic Josephson junction circuits using metal-silicide as metallic barrier material. We use sputter deposition of Nb and $MoSi_2$, PECVD deposition of silicon oxide as insulator material, and ICP-RIE for metal and oxide etch. The advantage of the metal-silicide barrier in the Nb junction process is that it can be etched in $SF_6$ RIE together with Nb electrode. In order to define a junction area precisely and uniformly, end-point detection for the RIE process is critical. In this paper, we employed thin Al layer for the etch stop, and optimized the etch condition. We have successfully demonstrated that the etch stop properties of the inserted Al layer give a uniform etch profile and a precise thickness control of the base electrode in Nb trilayer junctions.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.4
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• pp.793-798
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• 2016

In this work, the memory window characteristics of vertical nanowire device with asymmetric source and drain was analyzed using bipolar junction transistor mode for 1T-DRAM application. A gate-all-around (GAA) MOSFET with higher doping concentration in the drain region than in the source region was used. The shape of GAA MOSFET was a tapered vertical structure that the source area is larger than the drain area. From hysteresis curves using bipolar junction mode, the memory windows were 1.08V in the forward mode and 0.16V in the reverse mode, respectively. We observed that the latch-up point was larger in the forward mode than in the reverse mode by 0.34V. To confirm the measurement results, the device simulation has been performed and the simulation results were consistent in the measurement ones. We knew that the device structure with higher doping concentration in the drain region was desirable for the 1T-DRAM using bipolar junction mode.

• Proceedings of the Korean Magnestics Society Conference
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• 2006.11a
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• pp.38-38
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• 2006

• Proceedings of the Korean Vacuum Society Conference
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• 2009.02a
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• pp.173.1-173.1
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• 2009

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1370-1371
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• 2006

An electrostatic discharge (ESD) protection device, so called, N-type extended drain silicon controlled rectifier (NEDSCR) device, was analyzed for high voltage I/O applications. A conventional NEDSCR device shows typical SCR-like characteristics with extremely low snapback holding voltage. This may cause latchup problem during normal operation. However, a modified NEDSCR device with proper junction / channel engineering demonstrates itself with both the excellent ESD protection performance and the high latchup immunity.

• 한국초전도학회:학술대회논문집
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• v.12
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• pp.8-8
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• 2002

• Proceedings of the Korean Vacuum Society Conference
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• 2008.08a
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• pp.58-58
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• 2008