• Journal of Genetic Medicine
• /
• 제2권1호
• /
• pp.1-5
• /
• 1998

A female hemihypertrophy patient with hypomelanosis of Ito is presented as a rare case combining classical features of both the syndrome. Chromosomal profile has been based on longitudinal study of repeated lymphocyte cultures during 1984-1992. The propositus has exhibited chromosomal mosaicism both hypoploid ($42{\pm}1$) and hyperploid ($48{\pm}2$ chromosome) counts, but the major stem line presented 46XX chromosomes. Ring chromosome with simple and complex translocations with marker dots appear to be the major cytogenetic assemblage of this child to posses unequal left and right halves of the body. Each and every organ from toe to the head has grown up unequally and lately the patient had been exhibiting different dark and light shapes of melanin on the skin. We believe that the patient had inherited, through her male parent, "a few" mutated loci on some chromosomes so as to generate different cell lines within the developing child. All sibs and the mother showed normal karyotype with no apparent aberration.

• 한국신재생에너지학회:학술대회논문집
• /
• 한국신재생에너지학회 2011년도 춘계학술대회 초록집
• /
• pp.129.1-129.1
• /
• 2011

a-Si:H/c-Si 구조의 이종접합 태양전지 전면 투명전도막으로 Indium tin oxide(ITO) 박막의 조건에 따라 태양전지 특성을 연구하였다. ITO 박막은 파우더 타겟으로 마그네트론 스퍼터링 방식으로 성막하였고, 증착 온도(Ts)에 따라 전기적, 광학적 특성을 비교, 분석하였다. 기판 증착 온도가 증가할수록 박막의 저항이 낮아지는 것으로 나타났으며 $350^{\circ}C$ 조건에서 가장 낮은 저항($34.2{\Omega}$/sq)을 보였다. 투과도 또한 기판 증착 온도가 올라갈수록 전반적인 향상을 나타냈다. a-Si:H/c-Si 기판의 MCLT(minority carrier lifetime)는 $350^{\circ}C$에서 최적($359{\mu}s$)의 결과를 나타냈다. 그 이상의 기판 온도에서는 오히려 감소하였는데, 이는 높은 온도에서의 a-Si:H/c-Si 계면의 열손상으로 판단된다.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
• /
• pp.347.2-347.2
• /
• 2016

Recently, in order to improve the performance of the colloidal quantum dot solar cells (CQDSCs), various efforts such as the modification of the cell architecture and surface treatment for quantum dot (QD) passivation have been made. Especially, the incorporation of halides into the QD matrix was reported to improve the performances significantly via passivating QD trap states that lower the life-time of the minority-carrier. In this work, we fabricated a lead sulfide (PbS) QD bilayer treated with different ligands and utilized it as a photoactive layer of the CQDSCs. The bottom and top PbS layer was treated using metal iodide ($MI_x$ and butanedithiol (BuDT), respectively. All the depositions and ligand treatments were carried out in air using layer-by-layer spin-coating process. The fabrication of the active layers as well as the n-type zinc oxide (ZnO) layer was successfully carried out on the bendable indium-tin-oxide (ITO)-coated polyethylene terephthalate (PET) substrate, which implies that this technique can be applied to the fabrication of flexible and/or wearable solar cells. The power conversion efficiency (PCE) of the CQDSCs with the architecture of $PET/ITO/ZnO/PbS-MI_x/PbS-BuDT/MoO_x/Ag$ reached 4.2 %, which is significantly larger than that of the cells with single QD (PbS-BuDT) layer.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
• /
• pp.239.2-239.2
• /
• 2016

Numerous studies and approaches have been performed for solar cells to improve their photoelectric conversion efficiencies. Among them, the study for electrode containing transparent conducting oxide (TCO) layers is one of issues as well as for the cell structure based on band theory. In this study, we focused on an interfacial layer between p-type silicon and indium tin oxide (ITO) well-known as TCO materials. According to current-voltage characteristics for the sample with the interfacial layers, the improvement of band alignment between p-type silicon and ITO was observed, and their ohmic properties were enhanced in the proper condition of deposition. To investigate cause of this improvement, spectroscopic ellipsometry and ultraviolet photoelectron spectroscopy were utilized. Using these techniques, band alignment and defect in the band gap were examined. The major materials of the interfacial layer are vanadium oxide and tungsten oxide, which are notable as a hole transfer layer in the organic solar cells. Finally, the interfacial layer was applied to silicon solar cells to see the actual behavior of carriers in the solar cells. In the case of vanadium oxide, we found 10% of improvement of photoelectric conversion efficiencies, compared to solar cells without interfacial layers.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
• /
• pp.457-458
• /
• 2008

본 연구에서는 PCBM([6，6]-Phenyl $C_{61}$ butric acid methyl ester)과 P3HT(Poly(3-hexylthiophene-2,5-diyl (regiorandom))의 Donor, Acceptor 물질을 이용하여 스핀코팅법을 사용하여 PEDOT가 코팅된 ITO 유리기판에 스핀 코팅법을 사용하여 광활성층을 증착하였다. 이렇게 코팅된 유리기판에 열 증착법 사용하여 Al(cathode층)전극을 증착하여 유기태양전지를 제작하였다. 각각의 층에 대해서 SEM(전자주사현미경)을 이용하여 두께를 측정하였고 UV분광계를 이용하여 투과도를 측정하고 투과도를 이용하여 광학적 밴드갭을 계산하였다. ITO/PEDOT/ACTIVE AREA/Al 구조의 태양전지를 제작하여 광활성층의 두께와 Al의 두께에 따른 효율성을 측정하여 1% 이내의 효율을 보이는 태양전지를 제작하였다. PEDOT는 OLED에서 HTL층으로 사용되며 흘의 이동을 원활하게 해주는 역할을 한다.

• 반도체디스플레이기술학회지
• /
• 제5권2호
• /
• pp.7-10
• /
• 2006

The detailed studies regarding to the front and rear panel geometries of plasma display were needed to improve the luminance and efficiency. In plasma displays, 3-dimensional optical code can be used to analyze the variation of geometries and the changing of optical properties. The visible light distributions and illuminance were simulated depending on bus electrode position, ITO geometries, and alteration of dielectric layer's properties. This paper is concerned with development of a cell having high luminance and high efficiency for optical simulation. And the result of values could be expected to the application of real POP cell.

• 한국전기전자재료학회논문지
• /
• 제18권12호
• /
• pp.1148-1151
• /
• 2005

Photovoltaic effects in organic solar cell were studied in a cell configuration of ITO/PEDOT:PSS/CuPc(20 nm)/$C_{60}$(40 nm)/BCP/Al(150 nm) at room temperature. Here, the BCP layer works as an exciton blocking layer. The exciton blocking layer must transport electrons from the acceptor layer to the metal cathode with minimal increase in the total cell series resistance and should absorb damage during cathode deposition. Therefore, a proper thickness of the exciton blocking layer is required for an optimized photovoltaic cell. Several thicknesses of BCP were made between $C_{60}$ and Al. And we obtained characteristic parameters such as short-circuit current, open-circuit voltage, and power conversion efficiency of the device under the illumination of AM 1.5.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2005년도 추계학술대회 논문집 Vol.18
• /
• pp.273-274
• /
• 2005

Photovoltaic effects in organic solar cell were studied in a cell configuration of ITO/PEDOT:PSS/CuPc(20nm)/$C_{60}$(40nm)/BCP/Al(150nm) at room temperature. Here, the BCP layer works as an exciton blocking layer. The exciton blocking layer must transport electrons from the acceptor layer to the metal cathode with minimal increase in the total cell series resistance and should absorb damage during cathode deposition. Therefore, a proper thickness of the exciton blocking layer is required for an optimized photovoltaic cell. Several thicknesses of BCP were made between $C_{60}$ and Al. And we obtained characteristic parameters such as short-circuit current, open-circuit voltage, and power conversion efficiency of the device under the illumination of AM 1.5.

• 한국반도체및디스플레이장비학회:학술대회논문집
• /
• 한국반도체및디스플레이장비학회 2006년도 춘계학술대회
• /
• pp.160-163
• /
• 2006

고정세 PDP에서 방전 cell의 휘도와 효율을 증가시키기 위해서는 cell을 구성하고 있는 layer의 광학 성질과 구조를 고려한 설계가 필요하다. 3-dimensional optical code를 사용한 새로운 접근 방법은 다양한 geometry의 구성, 광학 성질의 적용의 용이함, 정확한 분석 데이터 등의 장점을 활용하여 PDP cell의 구조와 재료 변화에 따른 광 패턴과 조도 ($1m/mm^2$)를 관찰함으로써 향상된 휘도와 효율 특성을 갖는 cell 구조를 설계할 수 있게 된다. 본 논문은 PDP 상판을 구성하는 ITO, bus electrode, dielectric layer의 구조와 광학특성을 변화 시키고, 현재 양산 모델에 적용중인 다양한 상판 구조를 optical code를 활용하여 연산하여 도출된 결과를 비교하였다.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2000년도 영호남학술대회 논문집
• /
• pp.120-123
• /
• 2000

Bridge Type Cell structure informed that the efficiency is increased by about 30% compared to the conventional type has been investigated during addressing period. As a result, the addressing time is decreased by about 20% compared to the conventional type. And wall charge distribution was analyzed Quantitatively in three electrodes during addressing period.