• Journal of the Korea Society of Computer and Information
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• v.3 no.2
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• pp.77-84
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• 1998

The continuous time signal system by development of CMOS technology have been receiving consideration attention. In this paper, Low pass filter using CMOS floating resistor have been designed with cut off frequency for speech signal processing. Especially a new floating resistor consisting entirely of CMOS devices in saturation has been developed. Linearity within $\pm$0.04% is achieved through nonlineartiy via current mirrors over an applied range of $\pm$1V. The frequency response exceeds 10MHz, and the resistors are expected to be useful in implementing integrated circuit active RC filters. The low pass filter designed using this method has simpler structure than switched capacitor filter. So reduce the chip area. The characteristics of the designed low pass filter using this method are simulated by pspice program.

• The Journal of the Acoustical Society of Korea
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• v.19 no.3
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• pp.11-19
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• 2000

This research deals with the implementation procedures of a chorus processing DSP for karaoke system. It is necessary to compress the chorus data to store as many choruses as we can. We apply MPEG-1 audio algorithm to compress the chorus data. And the chorus system must be accompanied with the karaoke that can change the key and the tempo. So the chorus DSP must be able to change the key and tempo of the chorus data. We apply SOLA (Synchronized Overlap and Add) to do it. We designed the chorus DSP that can compress the chorus, change the key and tempo. And we verified the chorus DSP logic using FPGA. The used FPGA are two FLEX10K100s made by ALTERA. Finally we make the ASIC chip of chorus DSP and verify its operation.

• Journal of Korea Multimedia Society
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• v.23 no.2
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• pp.317-327
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• 2020

R&D(Research and Development) efficiency analysis is a very important issue in academia and industry. Although many studies have been conducted to analyze R&D(Research and Development) efficiency since the past, studies that analyzed R&D(Research and Development) efficiency considering both patentability and patent quality efficiency according to the financial performance of a company do not seem to have been actively conducted. In this study, measuring the patent application and patent quality efficiency according to financial performance, patent quality efficiency according to patent application were applied to corporate groups related to artificial intelligence hardware technology defined as GPU(Graphics Processing Unit), FPGA(Field Programmable Gate Array), ASIC(Application Specific Integrated Circuit) and Neuromorphic. We analyze the efficiency empirically and use Data Envelopment Analysis as a measure of efficiency. This study examines which companies group has high R&D(Research and Development) efficiency about artificial intelligence hardware technology.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.370-373
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• 2003

As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric(IMD) layer with free-defect. However, as the IMD layer gets thinner, micro-scratches are becoming as major defects. Chemical-Mechanical Planarization(CMP) of conductors is a key process in Damascene patterning of advanced interconnect structure. The effect of alternative commerical slurries pads, and post-CMP cleaning alternatives are discuess, with removal rate, scratch dentisty, surface roughness, dishing, erosion and particulate density used as performance metrics. Electroplated copper depostion is a mature process from a historical point of view, but a very young process from a CMP persperspective. While copper electrodepostion has been used and stuidied for dacades, its application to Cu damascene wafer processing is only now ganing complete accptance in the semiconductor industry. The polishing mechanism of Cu CMP process has been reported as the repeated process of passive layer formation by oxidizer and abrasion action by slurry abrasives. however it is important to understand the effect of oxidizer on copper pasivation layer in order to obtain higher removal rate and non-uniformity during Cu-CMP process. In this paper, we investigated the effects of oxidizer on Cu-CMP process regarding the additional volume of oxidizer.

• KIEE International Transactions on Electrophysics and Applications
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• v.3C no.4
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• pp.155-160
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• 2003

In this study, an Alexandrite laser system for hair removal adopting a multi-discharge method in which three flash lamps are turned on consecutively was designed and fabricated to examine the pulse width and the pulse shape of the laser beams depending upon the changes in the lamp turn-on time. Specifically, this study demonstrates a technology that makes it possible to formulate various pulse shapes by turning on three flashlamps consecutively on a real-time basis with the aid of a PIC (program integrated circuit) one-chip microprocessor. With this technique, the lamp turn-on delay time can be varied more diversely from 0 to 10 ms and real-time control is possible with an external keyboard, enabling an assortment of pulse shapes. In addition, longer pulses can be more widely used for industrial processing as well as for numerous medical purposes.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.2
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• pp.355-358
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• 2010

As CMOS technology continues to scale down, signal processing is favorably done in the digital domain, which requires Analog-to-Digital (A/D) Converter to be integrated on-chip. This paper presents a design methodology of 12-bit 1-MS/s Rail-to-Rail fully differential SAR ADC using Deep N-well Switch based on binary search algorithm. Proposed A/D Converter has the following architecture and techniques. Firstly, chip size and power consumption is reduced due to split capacitor array architecture and charge recycling method. Secondly, fully differential architecture is used to reduce noise between the digital part and converters. Finally, to reduce the mismatch effect and noise error, the circuit is designed to be available for Rail-to-Rail input range using simple Deep N-well switch. The A/D Converter fabricated in a TSMC 0.18um 1P6M CMOS technology and has a Signal-to-Noise-and-Distortion-Ratio(SNDR) of 69 dB and Free-Dynamic-Range (SFDR) of 73 dB. The occupied active area is $0.6mm^2$.

• The Journal of Natural Sciences
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• v.7
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• pp.27-35
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• 1995

This paper introduces a VLSI (Very Large Scale Integrated Circuit) implementation of the 2-D Discrete Cosine Transform (DCT) with an application to image and video coding. This implementation, which is based upon a state space model, uses both algorithm and data partitioning to achieve high efficiency. With this implementation, the amount of data transfers between the processing elements (PEs) are reduced and all the data transfers are limitted to be local. This system accepts the input as a progressively scanned data stream which reduces the hardware required for the input data control module. With proper ordering of computations, a matrix transposition between two matrix by matrix multiplications, which is required in many 2-D DCT systems based upon a row-column decomposition, can be also removed. The new implementation scheme makes it feasible to implement a single 2-D DCT VLSI chip which can be easily expanded for a larger 2-D DCT by cascading these chips.

• Journal of Institute of Control, Robotics and Systems
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• v.4 no.3
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• pp.384-391
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• 1998

When a device is mounted on the PCB, it is impossible to have zero defects due to many unpredictable problems. Among these problems, devices with bent corner leads due to mis-handling and which are not placed at a given point measured along the axis are principal problem in SMT(Surface Mounting Technology). It is obvious that given the complexity of the inspection task, the efficiency of a human inspection is questionable. Thus, new technologies for inspection of SMD(Surface Mounting Device) should be explored. An example of such technologies is the Automated Visual Inspection(AVI), wherein the vision system plays a key role to correct this problem. In implementing vision system, high-speed and high-precision are indispensable for practical purposes. In this paper, a new algorithm based on the Radon transform which uses a projection technique to inspect the FIC(Flat Integrated Circuit) device is proposed. The proposed algorithm is compared with other algorithms by measuring the position error(center and angle) and the processing time for the device image, characterized by line scan camera.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.2
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• pp.21-34
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• 2000

Millimeter wave is expected as the unlimited useful frequency resources for the next generation wireless communication services. In the past, its usage was limited to the military warfare due to lack of millimeter devices. The development of GaAs pHEMT in 1980 and the progress in the processing technologies made the new consumer wireless services possible utilizing millimeter waves. Specially, most of passive components necessary for circuit design can be integrated with GaAs pHEMTs and this removes the difficulty in assembly unavoidable in hybrid design. InP based pHEMTs developed later possess all the properties of GaAs and it shows many advantages in higher frequency applications. In this paper, the status and trends of those devices and MMICs are presented and the future developing trends is also described.

• The KIPS Transactions:PartD
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• v.9D no.3
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• pp.399-408
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• 2002

Component technology was proposed and applied to software development to overcome software crisis. Software component is a black box like an integrated circuit in hardware but it can not be utilized without good support specially for helping users understand efficiently. This paper shows that data book format for understanding hardware component can be well applied to representing software component. We selected an approach to understand component by matching the contents of data book with UML and API model technique. Besides, we added the architecture part and the interface which are the most important property of software component to the data book for software components. In order to verify effectiveness of components data book we extended batch descriptor in EJB and performed an experiment providing data book to programmers with components.