• Journal of the Korean Society for information Management
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• v.26 no.3
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• pp.295-316
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• 2009

This research applied the concepts of IT architecture and IT governance for managing with an integrated computing environment and organized structure, which base a digital library's management and operation. It also aims to analyze the structural system between information technology of human resources and strategy alignment elements of business, which both constitute the core content. Social network analysis software was used to investigate the complicated relationship between IT and business-related strategy alignment elements. The following is the results of carrying out this research on the social network structure and features of strategy alignment elements for a digital library. First, analysis indexes for strategy alignment elements and social network of a digital library were developed. Second, an analysis model was designed based on the analysis index for social network as to strategy alignment elements. Analysis model was appraised by collecting social network datasets for such strategy alignment elements as Communications, Competency and Value, Governance, Partnership, Scope and Architecture, and Skills against the Business strategy, Information strategy, Business and Technology of a digital library. As for the content of analysis, social network structure and specific features were analyzed in relation to a digital library's (1) General social network, (2) Structure of strategy alignment elements, (3) Strategy fit and Functional integration.

• Journal of Korea Spatial Information System Society
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• v.3 no.1 s.5
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• pp.49-62
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• 2001

Recently, component-based software has become main trends in designing and developing computer software products. This component-based software has advantage of the interoperability on distributed computing environment and the reusability of pre-developed components. Also, GIS is designed and implemented with this component-based methodology, called Open GIS Component. OGC(OpenGIS Consortium) have announced various implementation and design specification and topic in GIS. In GIS, Spatial analysis functions like network analysis, TIN analysis are very important function and basically, estimate system functionality and performance using this analysis methods. The simple feature geometry specification is announced by OGC to increase the full interoperability of various spatial data. This specification includes just geometry spatial data model. However, in GIS which manages spatial data, not only geometric data but also topological data and various analysis functions have been used. The performance of GIS depends on how this geometric and topological data is managed well and how various spatial analyses are executed efficiently. So it requires integrated spatial data model between geometry and topology and extended data model of topology for spatial analysis, in case network analysis and TIN analysis in open GIS component. In this paper, we design analysis component like network analysis component and TIN analysis component. To manage topological information for spatial analysis in open GIS component, we design extended data model of simple feature geometry for spatial analysis. In addition to, we design the overall system architecture of open GIS component contained this topology model for spatial analysis.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39C no.9
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• pp.828-840
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• 2014

There is a new evolution in technological advancement taking place called the Internet of Things (IoT). The IoT enables physical world objects in our surroundings to be connected to the Internet. For this idea to come to life, two architectures are required: the Sensing Entity in the environment which collects data and connects to the cloud and the Cloud Service that hosts the data. In particular, the combination of wireless sensor network for sensing and cloud computing for managing sensor data is becoming a popular intervention for the IoT era. The pharmaceutical cold chain requires controlled environmental conditions for the sensitive products in order for them to maintain their potency and fit for consumption. The monitoring of distribution process is the only assurance that a process has been successfully validated. The distribution process is so critical that anomaly at any point will result in the process being no longer valid. Taking the cold chain monitoring to IoT and using its benefits and power will result in better management and product handling in the cold chain. In this paper, Arduino based wireless sensor network for storage and logistics (land and sea) is presented and integrated with Xively cloud service to offer a real-time and innovative solution for pharmaceutical cold chain monitoring.

• International Journal of Advanced Culture Technology
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• v.5 no.1
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• pp.58-63
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• 2017

Emergencies and disasters can happen any time without any warning, and things can change and escalate very quickly, and often it is swift and decisive actions that make all the difference. It is a responsibility of the building facility management to ensure that a proven evacuation plan in place to cover various worst scenario to handled automatically inside the facility. To mapping out optimal safe escape routes is a straightforward undertaking, but does not necessarily guarantee residents the highest level of protection. The emergency evacuation navigation approach is a state-of-the-art that designed to evacuate human livings during an emergencies based on real-time decisions using live sensory data with pre-defined optimum path finding algorithm. The poor decision on causalities and guidance may apparently end the evacuation process and cannot then be remedied. This paper propose a cloud connected emergency evacuation system model to react dynamically to changes in the environment in emergency for safest emergency evacuation using IoT based emergency exit sign system. In the previous researches shows that the performance of optimal routing algorithms for evacuation purposes are more sensitive to the initial distribution of evacuees, the occupancy levels, and the type and level of emergency situations. The heuristic-based evacuees routing algorithms have a problem with the choice of certain parameters which causes evacuation process in real-time. Therefore, this paper proposes an evacuee routing algorithm that optimizes evacuation by making using high computational power of cloud servers. The proposed algorithm is evaluated via a cloud-based simulator with different "simulated casualties" are then re-routed using a Dijkstra's algorithm to obtain new safe emergency evacuation paths against guiding evacuees with a predetermined routing algorithm for them to emergency exits. The performance of proposed approach can be iterated as long as corrective action is still possible and give safe evacuation paths and dynamically configure the emergency exit signs to react for real-time instantaneous safe evacuation guidance.

• Journal of KIISE:Computing Practices and Letters
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• v.5 no.6
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• pp.782-792
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• 1999

효과적인 ATM 망의 관리는 연결 지향 환경, 다양한 서비스 등급, 대규모 트래픽, 가상 망 구성 그리고 여러가지 트래픽 유형 등과 같은 다양한 ATM 특성을 다룰 수 있어야만 한다. 이를 위해 ATM 포럼에서는 ATM 장치, 사설망, 공중망 및 그들간의 상호작용을 지원하기 위한 ATM 망 관리 참조 모델을 정의하였으며, 그 중 하나가 서로 다른 판매자로부터의 ATM 장비들간의 상호동작성을 보장하기 위해 SNMP 기반 망 관리 프로토콜을 통해 상호 연결된 인터페이스를 관리할 수 있도록 정의된 통합 지역 관리 인터페이스(ILMI) 프로토콜이다. ILMI의 목적은 두 인접한 ATM 장치로 하여금 그들 간에 공통의 ATM 링크에 대한 동작 파라메타를 자동적으로 구성할 수 있도록 함으로서, 관리자에 의해 수동 구성이 아닌 ATM 장치 상호간의 플러그 앤 플러그 기능을 지원하는데 있다. 본 논문에서는 이러한 ILMI 기술을 바탕으로 공중망 ATM 교환기에 연결된 가입자의 물리 인터페이스, ATM 계층 인터페이스, VPC 및 VCC의 구성 및 상태 정보를 효율적으로 관리하며, 가입자 시스템의 ATM 주소를 자동으로 등록, 관리할 수 있도록 하는 가입자 인터페이스 관리 시스템(SIMS)을 설계하고, 구현하였다. Abstract An effective ATM management must address the various features of ATM such as connection-oriented environment, varying class of service, large scale traffic, virtual network configurations and, and multiple traffic types. For this, ATM network management reference model defined by ATM Forum describes the various types of network management needed to support ATM devices, private networks, public networks, and the interaction between them. One of these types is Integrated Local Management Interface (ILMI) defined to manage interconnected interface through SNMP-based network management protocol for ensuring the interoperability of ATM devices from different vendors. The purpose of ILMI is to enable two adjacent ATM devices to automatically configure the operation parameters of the common ATM link between them and then to provide a Plug and Plug function to any ATM devices with not a passive configuration by manager but a automatic configuration. This paper design and implement a Subscriber Interface Management System (SIMS) which provide automatic registration and management of ATM address of subscriber system and efficiently manages physical interface of subscriber who is connected to public ATM switch, ATM layer interface, configuration information and status information of VPC and VCC.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.80-81
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• 2012

Recently, one of the critical issues in the etching processes of the nanoscale devices is to achieve ultra-high aspect ratio contact (UHARC) profile without anomalous behaviors such as sidewall bowing, and twisting profile. To achieve this goal, the fluorocarbon plasmas with major advantage of the sidewall passivation have been used commonly with numerous additives to obtain the ideal etch profiles. However, they still suffer from formidable challenges such as tight limits of sidewall bowing and controlling the randomly distorted features in nanoscale etching profile. Furthermore, the absence of the available plasma simulation tools has made it difficult to develop revolutionary technologies to overcome these process limitations, including novel plasma chemistries, and plasma sources. As an effort to address these issues, we performed a fluorocarbon surface kinetic modeling based on the experimental plasma diagnostic data for silicon dioxide etching process under inductively coupled C4F6/Ar/O2 plasmas. For this work, the SiO2 etch rates were investigated with bulk plasma diagnostics tools such as Langmuir probe, cutoff probe and Quadruple Mass Spectrometer (QMS). The surface chemistries of the etched samples were measured by X-ray Photoelectron Spectrometer. To measure plasma parameters, the self-cleaned RF Langmuir probe was used for polymer deposition environment on the probe tip and double-checked by the cutoff probe which was known to be a precise plasma diagnostic tool for the electron density measurement. In addition, neutral and ion fluxes from bulk plasma were monitored with appearance methods using QMS signal. Based on these experimental data, we proposed a phenomenological, and realistic two-layer surface reaction model of SiO2 etch process under the overlying polymer passivation layer, considering material balance of deposition and etching through steady-state fluorocarbon layer. The predicted surface reaction modeling results showed good agreement with the experimental data. With the above studies of plasma surface reaction, we have developed a 3D topography simulator using the multi-layer level set algorithm and new memory saving technique, which is suitable in 3D UHARC etch simulation. Ballistic transports of neutral and ion species inside feature profile was considered by deterministic and Monte Carlo methods, respectively. In case of ultra-high aspect ratio contact hole etching, it is already well-known that the huge computational burden is required for realistic consideration of these ballistic transports. To address this issue, the related computational codes were efficiently parallelized for GPU (Graphic Processing Unit) computing, so that the total computation time could be improved more than few hundred times compared to the serial version. Finally, the 3D topography simulator was integrated with ballistic transport module and etch reaction model. Realistic etch-profile simulations with consideration of the sidewall polymer passivation layer were demonstrated.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.975-976
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• 1993

This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}