• The KIPS Transactions:PartB
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• v.16B no.2
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• pp.123-130
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• 2009

Motion estimation (ME) plays an important role in digital video compression. But it limits the performance of image quality and encoding speed and is computational demanding part of the encoder. To reduce computational time and maintain the image quality, integer pel and fractional pel ME methods are proposed in this paper. The proposed method for integer pel ME uses a hierarchical search strategy. This strategy method consists of symmetrical cross-X pattern, multi square grid pattern, diamond patterns. These search patterns places search points symmetrically and evenly that can cover the overall search area not to fall into the local minimum and to reduce the computational time. The proposed method for fractional pel uses full search pattern, center biased fractional pel search pattern and the proposed search pattern. According to block sizes, the proposed method for fractional pel decides the search pattern adaptively. Experiment results show that the speedup improvement of the proposed method over Unsymmetrical cross Multi Hexagon grid Search (UMHexagonS) and Full Search (FS) can be up to around $1.2{\sim}5.2$ times faster. Compared to image quality of FS, the proposed method shows an average PSNR drop of 0.01 dB while showing an average PSNR gain of 0.02 dB in comparison to that of UMHexagonS.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.9B
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• pp.1697-1703
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• 1999

In this paper, we propose the fast block matching algorithm with half pel accuracy using the lower bound of mean absolute difference (MAD) at search point of half pel accuracy motion estimation. The proposed method uses the lower bound of MAD at search point of half pel accuracy which calculated from MAD's at search points of integer pel accuracy. We can reduce the computational complexity by executing the block matching operation only at the necessary search point. The points are selected when the lower bound of MAD at that point is smaller than reference MAD of integer pel motion estimation. Experimental results show that the proposed method can reduce the computational complexity considerably and keeping the same performance with conventional method.

• Proceedings of the Korea Information Processing Society Conference
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• 2006.05a
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• pp.153-156
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• 2006

본 논문에서는 H.264 표준화 기구인 Joint Video Team(JVT) 권고안의 정수 단위 화소 움직임 예측을 위한 Unsymmetrical-cross Multi-Hexagon-grid Search(UMHexagonS) 알고리즘에서 Uneven Multi-Hexagon-grid Search(UMHGS) 부분을 개선한 알고리즘을 제안한다. 제안하는 알고리즘은 이전 프레임의 동일위치 또는 상위 모드에서 이미 선택된 움직임 벡터(MV: Motion Vector)를 이용하여 신호 대 잡음 비(PSNR: Peak Signal to Noise Ratio) 및 평균 비트 율(Average Bitrates)을 유지하면서, 현재 매크로블록의 검색영역을 줄이는 것이 가능하다. 제안하는 알고리즘의 성능은 Full Search Block Matching Algorithm(FSBMA) 및 UMHexagonS 알고리즘의 integer pel 에 대한 SAD(Sum of Absolute Difference) 연산횟수로 비교평가 하였다. 그 결과, FSBMA 에 비하여 평균 97.64%, UMHexagonS 에 비하여는 평균 17.48%의 연산횟수를 감소시키는 우수함을 보였다.

• Journal of Broadcast Engineering
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• v.19 no.5
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• pp.699-712
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• 2014

In this paper, we propose a new Adaptive Search Range (ASR) decision algorithm for accelerating GPU-based Integer-pel Motion Estimation (IME) of High Efficiency Video Coding (HEVC). For deciding the ASR, we classify a frame into two models using Motion Vector Differences (MVDs) then adaptively decide the search ranges of each model. In order to apply the proposed algorithm to the GPU-based ME process, starting points of the ME are decided using only temporal Motion Vectors (MVs). The CPU decides the ASR as well as the starting points and transfers them to the GPU. Then, the GPU performs the integer-pel ME. The proposed algorithm reduces the total encoding time by 37.9% with BD-rate increase of 1.1% and yields 951.2 times faster ME against the CPU-based anchor. In addition, the proposed algorithm achieves the time reduction of 57.5% in the ME running time with the negligible coding loss of 0.6%, compared with the simple GPU-based ME without ASR decision.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.8A
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• pp.669-678
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• 2012

In this paper, we propose an efficient fast integer-pel motion estimation for H.264/AVC using local statistics of local motion vectors. Using neighboring motion vectors, we define a new statistical property that is used to determine a mode of motion search range of current block. In addition, an adaptive motion search range compensated method that is based on cumulative statistics of previous coded blocks is addressed to solve the problem of the statistical motion search range decision method. Experimental results show that proposed algorithm has the capability to reduce the computational cost over the other methods.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.41 no.6
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• pp.209-220
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• 2004

The main feature of H.264 standard against conventional video standards is the high coding efficiency and the network friendliness. In spite of these outstanding features, it is not easy to implement H.264 codec as a real-time system due to its high requirement of memory bandwidth and intensive computation. Although the variable block size motion compensation using multiple reference frames is one of the key coding tools to bring about its main performance gain, it demands substantial computational complexity due to SAD (Sum of Absolute Difference) calculation among all possible combinations of coding modes to find the best motion vector. For speedup of motion estimation process, therefore, this paper proposes fast algorithms for both integer-pel and fractional-pel motion search. Since many conventional fast integer-pel motion estimation algorithms are not suitable for H.264 having variable motion block sizes, we propose the motion field adaptive search using the hierarchical block structure based on the diamond search applicable to variable motion block sizes. Besides, we also propose fast fractional-pel motion search using small diamond search centered by predictive motion vector based on statistical characteristic of motion vector.

• Proceedings of the IEEK Conference
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• 2003.11a
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• pp.87-90
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• 2003

This paper presents a variable block size motion estimation (ME) algorithm and hardware architectures dedicated to H.264/AVC. Proposed ME architecture can achieve real-time processing for 720$\times$480@30Hz with search range of [-64, +63] in the horizontal and [-32, +31] in the vertical direction at integer-pel accuracy and upto 7 reference frames at the operating frequency of 54MHz.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.37 no.5
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• pp.54-63
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• 2000

We present a multi-resolution block matching algorithm (BMA) for fast motion estimation At the coarsest level, a motion vector (MV) having minimum matching error is chosen via a full search, and a MV with minimum matching error is concurrently found among the MVs of the spatially adjacent blocks Here, to examine the spatial MVs accurately, we propose an efficient method for searching full resolution MV s without MV quantization even at the coarsest level The chosen two MV s are used as the initial search centers at the middle level At the middle level, the local search is performed within much smaller search area around each search center If the method used at the coarsest level is adopted here, the local searches can be done at integer-pel accuracy A MV having minimum matching error is selected within the local search areas, and then the final level search is performed around this initial search center Since the local searches are performed at integer-pel accuracy at the middle level, the local search at the finest level does not take an effect on the overall performance So we can skip the final level search without performance degradation, thereby the search speed increases Simulation results show that in comparison with full search BMA, the proposed BMA without the final level search achieves a speed-up factor over 200 with minor PSNR degradation of 02dB at most, under a normal MPEG2 coding environment Furthermore, our scheme IS also suitable for hardware implementation due to regular data-flow.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.13 no.9
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• pp.4587-4605
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• 2019

High Efficiency Video Coding (HEVC) suffers from high computational complexity due to its quad-tree structure in motion estimation (ME). This paper exposes an adaptive search range decision algorithm for accelerating HEVC integer-pel ME on GPU which estimates the optimal search range (SR) using a MAP (Maximum A Posteriori) estimator. There are three main contributions; First, we define the motion feature as the standard deviation of motion vector difference values in a CTU. Second, a MAP estimator is proposed, which theoretically estimates the motion feature of the current CTU using the motion feature of a temporally adjacent CTU and its SR without any data dependency. Thus, the SR for the current CTU is parallelly determined. Finally, the values of the prior distribution and the likelihood for each discretized motion feature are computed in advance and stored at a look-up table to further save the computational complexity. Experimental results show in conventional HEVC test sequences that the proposed algorithm can achieves high average time reductions without any subjective quality loss as well as with little BD-bitrate increase.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.12
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• pp.48-54
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• 2010

This paper presents a high-performance architecture of integer-pel motion estimation circuit for H.264 video CODEC. Full search algorithm guarantees the best results by examining all candidate blocks. However, the full search algorithm requires a huge amount of computation and data. Many fast search algorithms have been proposed to reduce the computational efforts. The disadvantage of these algorithms is that data access from or to memory is very irregular and data reuse is difficult. In this paper, we propose an efficient integer-pixel motion estimation algorithm and the circuit architecture to improve the processing speed and reduce the external memory bandwidth. The proposed circuit supports seven kinds of variable block sizes and generates 41 motion vectors. We described the proposed high-performance motion estimation circuit at R1L and verified its operation on FPGA board. The circuit synthesized by using l30nm CMOS standard cell library processes 139.8 1080HD ($1,920{\times}1,088$) image frames per second and supports up to H.264 level 5.1.