• Title/Summary/Keyword: Instrumentation and Control System

Search Result 935, Processing Time 0.026 seconds

Implementation of a 4-Channerl ADPCM CODEC Using a DSP (DSP를 사용한 4채널용 ADPCM CODEC의 실시간 구현에 관한 연구)

  • Lee, Ui-Taek;Lee, Gang-Seok;Lee, Sang-Uk
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.22 no.5
    • /
    • pp.29-38
    • /
    • 1985
  • In this paper we have designed and implemented in real time a simple, efficient and flexible AOPCM cosec using a high speed digital processor, NEC 7720. For ADPCM system, we have used an instantaneous adaptive quantizer and a first-order fixed predictor. The software for NEC 7720 has been developed and it was found that the NEC 7720 was capable of performing the entire ADPCAt algorithm for 4 channels in real time as optimizing the program. Computer simulation has born made to investigate a computational accuracr of NEC 7720 and to de-termine necessary parameters for a ADPCM codec. Real telephone speech, RC-shaped Gaussian noise and 1004 Hz tone signal were used for simulation. In simulation, the parameters werc optimized from the computed SNR and the informal listening test. The developed software was tested in real time operation using a hardware emulator for NEC 7720. It took a maximum 23.25$\mu$s to encode one sample and 113.5$\mu$s, including all the necessary 1/0 operations, to encode 4 channels. In the case of decoding process, it took 24.75$\mu$s to decode one sample and 119.5$\mu$s to decode 4 channels.

  • PDF

FPGA integrated IEEE 802.15.4 ZigBee wireless sensor nodes performance for industrial plant monitoring and automation

  • Ompal, Ompal;Mishra, Vishnu Mohan;Kumar, Adesh
    • Nuclear Engineering and Technology
    • /
    • v.54 no.7
    • /
    • pp.2444-2452
    • /
    • 2022
  • The field-programmable gate array (FPGA) is gaining popularity in industrial automation such as nuclear power plant instrumentation and control (I&C) systems due to the benefits of having non-existence of operating system, minimum software errors, and minimum common reason failures. Separate functions can be processed individually and in parallel on the same integrated circuit using FPGAs in comparison to the conventional microprocessor-based systems used in any plant operations. The use of FPGAs offers the potential to minimize complexity and the accompanying difficulty of securing regulatory approval, as well as provide superior protection against obsolescence. Wireless sensor networks (WSNs) are a new technology for acquiring and processing plant data wirelessly in which sensor nodes are configured for real-time signal processing, data acquisition, and monitoring. ZigBee (IEEE 802.15.4) is an open worldwide standard for minimum power, low-cost machine-to-machine (M2M), and internet of things (IoT) enabled wireless network communication. It is always a challenge to follow the specific topology when different Zigbee nodes are placed in a large network such as a plant. The research article focuses on the hardware chip design of different topological structures supported by ZigBee that can be used for monitoring and controlling the different operations of the plant and evaluates the performance in Vitex-5 FPGA hardware. The research work presents a strategy for configuring FPGA with ZigBee sensor nodes when communicating in a large area such as an industrial plant for real-time monitoring.

Switching Filter Algorithm using Fuzzy Weights based on Gaussian Distribution in AWGN Environment (AWGN 환경에서 가우시안 분포 기반의 퍼지 가중치를 사용한 스위칭 필터 알고리즘)

  • Cheon, Bong-Won;Kim, Nam-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.26 no.2
    • /
    • pp.207-213
    • /
    • 2022
  • Recently, with the improvement of the performance of IoT technology and AI, automation and unmanned work are progressing in a wide range of fields, and interest in image processing, which is the basis of automation such as object recognition and object classification, is increasing. Image noise removal is an important process used as a preprocessing step in an image processing system, and various studies have been conducted. However, in most cases, it is difficult to preserve detailed information due to the smoothing effect in high-frequency components such as edges. In this paper, we propose an algorithm to restore damaged images in AWGN(additive white Gaussian noise) using fuzzy weights based on Gaussian distribution. The proposed algorithm switched the filtering process by comparing the filtering mask and the noise estimate with each other, and reconstructed the image by calculating the fuzzy weights according to the low-frequency and high-frequency components of the image.

AWGN Removal using Laplace Distribution and Weighted Mask (라플라스 분포와 가중치 마스크를 이용한 AWGN 제거)

  • Park, Hwa-Jung;Kim, Nam-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.25 no.12
    • /
    • pp.1846-1852
    • /
    • 2021
  • In modern society, various digital devices are being distributed in a wide range of fields due to the fourth industrial revolution and the development of IoT technology. However, noise is generated in the process of acquiring or transmitting an image, and not only damages the information, but also affects the system, causing errors and incorrect operation. AWGN is a representative noise among image noise. As a method for removing noise, prior research has been conducted, and among them, AF, A-TMF, and MF are the representative methods. Existing filters have a disadvantage that smoothing occurs in areas with high frequency components because it is difficult to consider the characteristics of images. Therefore, the proposed algorithm calculates the standard deviation distribution to effectively eliminate noise even in the high frequency domain, and then calculates the final output by applying the probability density function weight of the Laplace distribution using the curve fitting method.

Parallel Video Processing Using Divisible Load Scheduling Paradigm

  • Suresh S.;Mani V.;Omkar S. N.;Kim H.J.
    • Journal of Broadcast Engineering
    • /
    • v.10 no.1 s.26
    • /
    • pp.83-102
    • /
    • 2005
  • The problem of video scheduling is analyzed in the framework of divisible load scheduling. A divisible load can be divided into any number of fractions (parts) and can be processed/computed independently on the processors in a distributed computing system/network, as there are no precedence relationships. In the video scheduling, a frame can be split into any number of fractions (tiles) and can be processed independently on the processors in the network, and then the results are collected to recompose the single processed frame. The divisible load arrives at one of the processors in the network (root processor) and the results of the computation are collected and stored in the same processor. In this problem communication delay plays an important role. Communication delay is the time to send/distribute the load fractions to other processors in the network. and the time to collect the results of computation from other processors by the root processors. The objective in this scheduling problem is that of obtaining the load fractions assigned to each processor in the network such that the processing time of the entire load is a minimum. We derive closed-form expression for the processing time by taking Into consideration the communication delay in the load distribution process and the communication delay In the result collection process. Using this closed-form expression, we also obtain the optimal number of processors that are required to solve this scheduling problem. This scheduling problem is formulated as a linear pro-gramming problem and its solution using neural network is also presented. Numerical examples are presented for ease of understanding.

Analysis of Positive Logic and Negate Logic in 1bit adder and 4 bit adder 74LS283 (1bit 전 가산기와 4bit 덧셈 연산기 74LS283에서 의정 논리와 부 논리에 대한 분석)

  • Chung, Tong-Ho;Chung, Tea-Sang;You, Jun-Bok
    • Proceedings of the KIEE Conference
    • /
    • 2000.11d
    • /
    • pp.781-783
    • /
    • 2000
  • 1bit full adder have 3 input (including carry_in) and 2 outputs(Sum and Carry_out). Because of 1 bit full adder's propagation delay. We usually use 4-bit binary full adder with fast carry, 74LS283. The 74LS283 is positive logic circuit chip. But the logic function of binary adder is symmetrical, so it can be possible to use it not only positive logic but also the negative logic. This thesis use symmetrical property. such as $C_{i+1}(\bar{a_i}\bar{b_i}\bar{c_i})=C_{i+1}{\bar}(a_i,\;b_i,\;c_i)$ and $S_i(\bar{a_i}\bar{b_i}\bar{c_i})=\bar{S_i}(a_i,\;b_i,\;c_i)$. And prove this property with logic operation. Using these property, the 74LS283 adder is possile as the negation logic circuit. It's very useful to use the chip in negative logic. because many system chip is negative logic circuit. for example when we have negative logic chip with 74LS283. we don't need any not gate for 74LS283 input, and just use output of adder(74LS283) as the negation of original output.

  • PDF

Implementation of Wavelet Transform based Image Fusion and JPEG2000 using MAD Order Statistics for Multi-Image (MAD 순서통계량을 이용한 웨이블렛 변환기반 다중영상의 영상융합 및 JPEG2000 보드 구현)

  • Lee, Cheeol
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.17 no.11
    • /
    • pp.2636-2644
    • /
    • 2013
  • This paper is proposed a wavelet-based the order statistics MAD(Median Absolute Deviation) method of image fusion of Multi-image contaminated with visible image and infrared image. also The method of compared and defined the threshold the wavelet coefficients using MAD of the wavelet coefficients of the detail subbands was proposed to effectively fusion which of selected the high quality image of the two images. The existed fusion rule may be possible to get the distorted fusion image especially by the distortion in the relation between the pixel and indicator of two images in the existed fusion rules. In order to complement the disadvantage, the threshold of the proposed method sets up the image statistic and excludes the distortion. The hardware design is used FPGA of Xilinx and DSP system for the image fusion and compressed encoding of the proposed algorithm. Therefore the proposed method is totally verified by comparing with the several other multi-image and the proposed image fusion.

Modified Weight Filter Algorithm using Pixel Matching in AWGN Environment (AWGN 환경에서 화소매칭을 이용한 변형된 가중치 필터 알고리즘)

  • Cheon, Bong-Won;Kim, Nam-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.25 no.10
    • /
    • pp.1310-1316
    • /
    • 2021
  • Recently, with the development of artificial intelligence and IoT technology, the importance of video processing such as object tracking, medical imaging, and object recognition is increasing. In particular, the noise reduction technology used in the preprocessing process demands the ability to effectively remove noise and maintain detailed features as the importance of system images increases. In this paper, we provide a modified weight filter based on pixel matching in an AWGN environment. The proposed algorithm uses a pixel matching method to maintain high-frequency components in which the pixel value of the image changes significantly, detects areas with highly relevant patterns in the peripheral area, and matches pixels required for output calculation. Classify the values. The final output is obtained by calculating the weight according to the similarity and spatial distance between the matching pixels with the center pixel in order to consider the edge component in the filtering process.

Implementation of Zero-Ripple Line Current Induction Cooker using Class-D Current-Source Resonant Inverter with Parallel-Load Network Parameters under Large-Signal Excitation

  • Ekkaravarodome, Chainarin;Thounthong, Phatiphat;Jirasereeamornkul, Kamon
    • Journal of Electrical Engineering and Technology
    • /
    • v.13 no.3
    • /
    • pp.1251-1264
    • /
    • 2018
  • The systematic and effective design method of a Class-D current-source resonant inverter for use in an induction cooker with zero-ripple line current is presented. The design procedure is based on the principle of the Class-D current-source resonant inverter with a simplified load network model that is a parallel equivalent circuit. An induction load characterization is obtained from a large-signal excitation test-bench based on parallel load network, which is the key to an accurate design for the induction cooker system. Accordingly, the proposed scheme provides a systematic, precise, and feasible solution than the existing design method based on series-parallel load network under low-signal excitation. Moreover, a zero-ripple condition of utility-line input current is naturally preserved without any extra circuit or control. Meanwhile, a differential-mode input electromagnetic interference (EMI) filter can be eliminated, high power quality in utility-line can be obtained, and a standard-recovery diode of bridge-rectifier can be employed. The step-by-step design procedure explained with design example. The devices stress and power loss analysis of induction cooker with a parallel load network under large-signal excitation are described. A 2,500-W laboratory prototype was developed for $220-V_{rms}/50-Hz$ utility-line to verify the theoretical analysis. An efficiency of the prototype is 96% at full load.

Pattern Extraction of EMG Signal of Spinal Cord Injured Patients via Multiscaled Nonlinear Processing (다중스케일 비선형 처리를 통한 척수 손상 환자의 근전도 신호 패턴 추출)

  • Lee, Y. S.;Lee, J.;Kim, H. D.;Park, I. S.;Ko, H. Y.;Kim, S. H.
    • Journal of Biomedical Engineering Research
    • /
    • v.22 no.3
    • /
    • pp.249-257
    • /
    • 2001
  • The voluntary contracted EMG signal of spinal cord injured patients is very small because the information from central nervous system is not sufficiently transmitted to $\alpha$ motor neuron or muscle fiber. Therefore the acquisited EMG signal from needle or surface electrodes can not be identified obvious voluntary contraction pattern by muscle movement. In this paper we propose the extraction technique of voluntary muscle contraction and relaxation pattern from EMG signal of spinal cord injured patient whose EMG signal is composed of the linear sum of mo색 unit action potentials with two noise sources, additive noise assumed to be white Gaussian noise and high frequency discharge assumed to be not motor unit action potential but impulsive noise. In order to eliminate impulsive noise and additive noise from voluntary contracted EMG signal, we use the FatBear filter which is a nonarithmetic piecewise constant filter, and multiscale nonlinear wavelet denoising processing, respectively. The proposed technique is applied to the EMG signal acquisited from transverse myelitis patients to extract voluntary muscle contraction pattern.

  • PDF