• 대한임베디드공학회논문지
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• 제11권2호
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• pp.97-105
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• 2016

Microcontrollers (MCUs) for endpoint smart sensor devices of internet-of-thing (IoT) are being implemented as system-on-chip (SoC) with on-chip instruction flash memory, in which user firmware is embedded. MCUs directly fetch binary code-based instructions through bit-line sense amplifier (S/A) integrated with on-chip flash memory. The S/A compares bit cell current with reference current to identify which data are programmed. The S/A in reading '0' (erased) cell data consumes a large sink current, which is greater than off-current for '1' (programmed) cell data. The main motivation of our approach is to reduce the number of accesses of erased cells by binary code level transformation. This paper proposes a built-in write/read path architecture using binary code inversion method based on hot-spot region detection of instruction code access to reduce sensing current in S/A. From the profiling result of instruction access patterns, hot-spot region of an original compiled binary code is conditionally inverted with the proposed bit-inversion techniques. The de-inversion hardware only consumes small logic current instead of analog sink current in S/A and it is integrated with the conventional S/A to restore original binary instructions. The proposed techniques are applied to the fully-custom designed MCU with ARM Cortex-M0$^{TM}$ using 0.18um Magnachip Flash-embedded CMOS process and the benefits in terms of power consumption reduction are evaluated for Dhrystone$^{TM}$ benchmark. The profiling environment of instruction code executions is implemented by extending commercial ARM KEIL$^{TM}$ MDK (MCU Development Kit) with our custom-designed access analyzer.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 합동 추계학술대회 논문집 정보 및 제어부문
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• pp.376-379
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• 2001

In this paper, I design the control chip that controls inner test sequence of Logic Tester to test chip. Logic tester has the thirteen inner instructions to control test sequence in test. And these instructions are saved in memory with test pattern data. Control chip generates address and control signal such as read, write signal of memory. Before testing, necessary data such as start address, end address, etc. are written to inner register of control chip. When test started, control chip receives the instruction in start address and executes, and generates address and control signals to access tester' inner memory. So whole test sequence is controlled by making the address and control signal in tester's inner memory. Control chip designs instruction's execution blocks, respectively. So if inner instruction is added from now on, a revision is easy. The control chip will be made using FPGA of Xilinx Co. in future.

• 정보처리학회논문지A
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• 제11A권3호
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• pp.163-172
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• 2004

멀티미디어 응용프로그램의 데이터는 주소 간격이 일정한 스트리밍 패턴으로 참조되는 특성이 있다. 이러한 특성을 선인출방법에 적용하여 멀티미디어 응용프로그램의 수행속도를 향상시킬 수 있다. 참조예측표에 의한 선인출방법은 메모리 참조명령어의 과거 기록을 이용하여 규칙적으로 참조되는 메모리주소를 예측한다. 이 논문은 참조예측표를 사용하는 하드웨어 기반의 규칙 선인출방법에서 효율적인 참조예측표 운영방법을 제안한다. 참조예측표에 입력되는 메모리 참조명령어는 스칼라데이터 참조명령어와 스트리밍데이터 참조명령어로 구성된다. 스칼라데이터 참조명령어는 선인출에 사용되지 않으므로 스칼라데이터 참조명령어를 우선적으로 교체함으로서, 참조예측표를 효과적으로 사용할 수 있다. 이방법은 기존 FIFO 방법과 비교할 때, 선인출에 사용되는 스트리밍데이터 참조명령어를 참조예측표에 더 오래 유지함으로써, 선인출 성능이 향상된다.

• 한국도서관정보학회지
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• 제22권
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• pp.139-169
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• 1995

The purpose of this study is to analyze the search pattern and search outcome of the National Central Library OPAC users by measuring their success rates and identifying the factors of failure and the personal background which bring about the differences of the search outcome. Various methods have been used for the study. Personal interview was used to find the pattern of the search, observation method was used to investigate the search process and the failure factors, and a questionnaire was used to survey personal background of searchers. The data were collected during the period of 7 days from April 17, 1995 through April 23, 1995. The search of 1, 217 cases, sampling systematically 25% out of the whole users, were collected and analyzed for the study. The findings of the study can be summarized as follows : First, in regard to the pattern, known-item search(72.6%) was preferred to the subject search(27.4%) and in case of known-item search the access point used were in the order of title, author, title and author. Second, the overall success rate of known-item search was 50.3% and the success rates were in order of author and date, title, and author. The failure factors of known-item search were divided into users factor of 67% and the database factor of 33%, respectively. Third, in case of subject search, its overall success rate was 44.1% and the keyword was the major access point, and the average of precision ratio was very low. Fourth, the analysis of the personal background related to the search outcome has shown significant differences by sex, the experience of using OPAC, education level, and the frequency of using other information retrieval systems. Based on the results the following suggestions can be made to improve the search outcome : First, the system should be su n.0, pplemented online help function to assist users to overcome the failure during search. Second, user instruction in group or individual should be implemented for the users to understand the system.

• 한국정보과학회논문지:시스템및이론
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• 제31권11호
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• pp.658-672
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• 2004

멀티미디어 응용 프로그램은 방대한 양의 데이타를 실시간으로 고속 처리해야 한다. 적재/저장과 같은 메모리 참조 명령어는 프로세서의 고속 수행을 방해하는 주요인이다. 메모리 참조 속도를 향상시키기 위하여, 다음에 참조될 것으로 예상되는 데이타를 미리 캐시로 인출함으로써, 캐시 미스율과 전체 수행시간을 감소시키는 캐시 선인출 방법이 활용되고 있다. 본 연구에서는 기존의 참조예측표(RPT: Reference Prediction Table)를 사용하는 방법을 개선한 데이타 캐시 선인출 방법을 제시한다. 동일한 명령어가 참조하는 데이타의 주소간격을 계산할 때 캐시의 라인크기 단위의 주소간격을 사용하고, 규칙적인 주소간격에 불규칙한 간격이 하나 포함하더라도 선인출 효과를 유지할 수 있도록 선인출 알고리즘을 개선하였다. 일반적으로 많이 사용되는 멀티미디어 프로그램에 대하여 실험한 결과, 기존의 RPT 방식에 비하여 버스 사용량은 약 0.03% 증가한 반면에 캐시 미스율은 평균적으로 29% 정도 향상되었다.