• Journal of Power Electronics
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• v.14 no.5
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• pp.908-917
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• 2014

For the purpose of designing an intrinsic safety Flyback converter with minimal output voltage ripple based on a specified output current, this paper first classified the energy transmission modes of the system into three sorts, namely, the Complete Inductor Supply Mode-CCM (CISM-CCM), the Incomplete Inductor Supply Mode-CCM (IISM-CCM) and the Incomplete Inductor Supply Mode-DCM (IISM-DCM). Then, the critical secondary self-inductance assorting the three modes are deduced and expressions of the output voltage ripples (OVR) are presented. For a Flyback converter with constant loads and switching frequency, it is shown that the output voltage ripple in the CISM-CCM is the smallest and that it has no relationship with the secondary self-inductance. Otherwise, the OVR of the other two modes are bigger than the previously mentioned one. It is concluded that the critical inductance between the CISM-CCM and the IISM-CCM is the minimal secondary self-inductance to ensure the smallest output voltage ripple. At last, a design method to guarantee the minimum OVR within the scales of the input voltage and load are analyzed, and the minimum secondary self-inductance is proposed to minimize the OVR. Simulations and experiments are given to verify the results.

• Journal of Electrical Engineering and Technology
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• v.9 no.2
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• pp.532-540
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• 2014

It is necessary to measure the current of rotor for controlling the active and reactive power generated by the stator side of the doubly fed induction generator (DFIG) system. There are offset and scaling errors in the current measurement. The offset and scaling errors cause one and two times current ripples of slip frequency in the synchronous reference frame of vector control, respectively. This paper proposes a compensation method to reduce their ripples. The stator current is variable according to the wind force but the rotor current is almost constant. Therefore input of the rotor current is more useful for a compensation method. The proposed method adopts the synchronous d-axis current of the rotor as the input signal for compensation. The ripples of the measurement errors can be calculated by integrating the synchronous d-axis stator current. The calculated errors are added to the reference current of rotor as input of the current regulator, then the ripples are reduced. Experimental results show the effectiveness of the proposed method.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.8
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• pp.593-600
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• 2010

In this paper, High brightness LED (light-emitting diodes) driver IC (integrated circuit) using new current sensing circuit is proposed. This LED driver IC can provide a constant current with high current precision over a wide input voltage range. The proposed current-sensing circuit is composed of a cascode current sensor and a current comparator with only one reference voltage. This IC minimizes the voltage stress of the MOSFET (metal oxide semiconductor field effect transistor) from the maximum input voltage and has low power consumption and chip area by using simple-structured comparator and minimum bias current. To confirm the functioning and characteristics of our proposed LED driver IC, we designed a buck converter. The LED current ripple of the designed IC is in ${\pm}5%$ and a tolerance of the average LED current is lower than 2.43%. This shows much improved feature than the previous method. Also, protections for input voltage and operating temperature are designed to improve the reliability of the designed IC. Designed LED driver IC uses 1.0 ${\mu}m$ X-Fab. BiCMOS process parameters and electrical characteristics and functioning are verified by spectre (Cadence) simulation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.9-9
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• 2010

In this paper, High Brightness LED driver IC using new current sensing circuit is proposed. This LED driver IC can provide a constant current with high current precision over a wide input voltage range. The proposed current-sensing circuit is composed of a cascode current sensor and a current comparator with only one reference voltage. This IC minimizes the voltage stress of the MOSFET from the maximum input voltage and has low power consumption and chip area by using simple-structured comparator and minimum bias current. The LED current ripple of the designed IC is in ${\pm}5%$ and a tolerance of the average LED current is lower than 2.43%. This shows much improved feature than the previous method. Also, protections for input voltage and operating temperature are designed to improve the reliability of the designed IC. Designed LED driver IC uses $1{\mu}m$ X-Fab. BiCMOS process parameters and electrical characteristics and functioning are verified by spectre(Cadence) simulation.

• Proceedings of the KIEE Conference
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• 1997.07f
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• pp.2210-2212
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• 1997

A sensorless input current controller for three phase PWM converter is proposed. A merit of this controller is that sinusoidal input line current, unity power factor, and ripple-free DC voltage can be achieved with low-cost. The paper describes the proposed control strategy and its implementation. Simulation result for the proposed controller is compared with that of the sensor based version.

• Journal of Power Electronics
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• v.16 no.3
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• pp.925-935
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• 2016

This paper proposes a new interleaved double-input three-level Boost (DITLB) converter, which is composed of two boost converters indirectly in series. Thus, a high voltage gain, together with a low component stress and a small input current ripple due to the interleaved control scheme, is achieved. The operating principle of the DITLB converter under the individual supplying power (ISP) and simultaneous supplying power (SSP) mode is analyzed. In addition, closed-loop control strategies composed of a voltage-current loop and a voltage-balance loop, have been researched to make the converter operate steadily and to alleviate the neutral-point imbalance issue. Experimental results verify correctness and feasibility of the proposed topology and control strategies.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.278-280
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• 2002

Microstep driving method is adopted to reduce the thrust ripple of LPM(Linear Pulse Motor). It controls each phase current to improve the resolution of position. Therefore, the phase current waveform affects the characteristics of LPM in microstep drive. In this paper, the characteristics of LPM was investigated in accordance with phase current waveform.

• Proceedings of the KIEE Conference
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• 2008.10c
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• pp.105-110
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• 2008

This Paper proposes Dual-PI controller for high performance control of IPMSM drive. Input of traditional PI control used speed error, but Dual-PI controller used two input speed error, current error and output is output is f-axis current. Dual-PI controller is Possible both speed control and current control because it used speed error and current error Therefore, dual-PI controller can is reduced current ripple. This paper is made analysis performance of algorithm and proposes result.

• Journal of Power Electronics
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• v.14 no.4
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• pp.661-670
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• 2014

A new DC/DC converter with zero voltage switching is proposed for applications with high input voltage and high load current. The proposed converter has two circuit modules that share load current and power rating. Interleaved pulse-width modulation (PWM) is adopted to generate switch control signals. Thus, ripple currents are reduced at the input and output sides. For high-voltage applications, each circuit module includes two half-bridge legs that are connected in series to reduce switch voltage rating to $V_{in}/2$. These legs are controlled with the use of asymmetric PWM. To reduce the current rating of rectifier diodes and share load current for high-load-current applications, two center-tapped rectifiers are adopted in each circuit module. The primary windings of two transformers are connected in series at the high voltage side to balance output inductor currents. Two series capacitors are adopted at the AC terminals of the two half-bridge legs to balance the two input capacitor voltages. The resonant behavior of the inductance and capacitance at the transition interval enable MOSFETs to be switched on under zero voltage switching. The circuit configuration, system characteristics, and design are discussed in detail. Experiments based on a laboratory prototype are conducted to verify the effectiveness of the proposed converter.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.2
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• pp.120-126
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• 2021

DC-link capacitors are one of the main components in two-level three-phase voltage source inverters (VSIs); they provide the pulsating input current and stabilize the vacillating DC-link voltage. Ideally, the larger the capacitance of DC-link capacitors, the better the DC-link voltage stabilizes. However, high capacitance increases the cost and decreases the power density of VSI systems. Therefore, the capacitance should be chosen carefully on the basis of the DC-link voltage ripple requirement. However, the DC-link voltage ripple is dependent on the pulse-width modulation (PWM) strategy. This study especially presents a DC-link voltage ripple analysis when the minimum loss discontinuous PWM strategy is applied. Furthermore, an equation for the selection of the minimum capacitance of DC-link capacitors is proposed. Experimental results with R-L loads are also provided to verify the effectiveness of the presented analysis.