• Journal of Electrical Engineering and Technology
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• 제13권1호
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• pp.333-344
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• 2018

This proposed paper aims for the high efficiency contactless power transfer in household dc power distribution. A 300 W five-level diode clamped multi-level converter with 300 Vdc input dc link bus is employed for the power transferring task and the output voltage range is controlled at 48 Vdc. The inner and outer solenoid coils are used for inductive power transfer (IPT) transformer with the 200 kHz switching frequency for designed power density. Therefore, to achieve the converter efficiency above 95%, the LLC series resonant with fundamental harmonic analysis (FHA) and the calculated switching angles are used as an optimized tool for designing the system resonant tank. The validations of this approached topology are illustrated in both MATLAB/Simulink simulation and implementation.

• Nuclear Engineering and Technology
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• 제53권12호
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• pp.3902-3909
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• 2021

SACOS series of subchannel analysis codes have been developed by XJTU-NuTheL for many years and are being used for the thermal-hydraulic safety analysis of various reactor cores. To achieve fine whole core pin-level analysis, the input preprocessing and parallel capabilities of the code have been developed in this study. Preprocessing is suitable for modeling rectangular and hexagonal assemblies with less error-prone input; parallelization is established based on the domain decomposition method with the hybrid of MPI and OpenMP. For domain decomposition, a more flexible method has been proposed which can determine the appropriate task division of the core domain according to the number of processors of the server. By performing the calculation time evaluation for the several PWR assembly problems, the code parallelization has been successfully verified with different number of processors. Subsequent analysis results for rectangular- and hexagonal-assembly core imply that the code can be used to model and perform pin-level core safety analysis with acceptable computational efficiency.

• 전력전자학회논문지
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• 제25권2호
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• pp.127-132
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• 2020

In this study, single-phase and three-level boost converters applied to the photovoltaic system were compared and analyzed in terms of efficiency and power density according to the input voltage and load conditions. For accurate analysis of efficiency, the losses in each device of the single-phase and three-level boost converters were derived using mathematical equations and simulations by using the PSIM thermal module. Then, the losses were compared with the efficiency confirmed through the actual experiments. Results confirmed that the efficiency and power density can be improved by applying the three-level boost converter to the system according to the selection of the switching frequency.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 추계학술대회 논문집 학회본부
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• pp.500-504
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• 1997

Current source inverter drives of auto sequentially commutated type are very popular in high power applications, because of simple power circuit configuration with four quadrant operation. But the six-step current output create harmonic problems and the input power factor of such a drive is not always good. In this respect pulse width modulated drives using gate turn off thyristors ( GTO ) are finding application, especially in traction drives. However the switching and snubber loses of a GTO do not permit the inverter switching frequency go beyond a few hundred hertz.This will again introduce low frequency harmonic problems. Multi level inverters of the 3-level and 5-level can be considered as an alternative to overcome the low switching frequency harmonic problem of the 2-level GTO inverters. But with multi level inverters the complexity of the power circuit increases. In this paper a combination of multi level ( 2-level and 3-level ) inverters and multi phase induction motor ( 3-phase and 6-phase) configurations are presented for high power VSI drives for traction applications with reduced inverter switching frequency requirements coupled with reduced voltage rating for the power switch.

• JSTS:Journal of Semiconductor Technology and Science
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• 제10권1호
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• pp.55-60
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• 2010

For battery-powered device applications, which grow rapidly in the electronic market today, low-power becomes one of the most important design issues of CMOS VLSI circuits. A multi-VDD system, which uses more than one power-supply voltage in the same system, is an effective way to reduce the power consumption without degrading operating speed. However, in the multi-VDD system, level converters should be inserted to prevent a large static current flow for the low-to-high conversion. The insertion of the level converters induces the overheads of power consumption, delay, and area. In this paper, we propose a new level converter which can provide the level up/down conversions for the various input and output voltages. Since the proposed level converter uses only one power-supply voltage, it has an advantage of reducing the complexity in physical design. In addition, the proposed level converter provides lower power and higher speed, compared to existing level converters.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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• pp.121-124
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• 2001

This paper proposed resource allocation algorithm for the minimum switching activity of functional unit in high level synthesis process as like DSP which is circuit to give many functional unit. The resource allocation method after scheduling use the power function calculating average hamming distance and switching activity of the between two input. First of all, the switching activity is calculated by the input value after calculating the average hamming distance between operation. In this paper, the proposed method though high If level simulation find switching activity in circuit each functional unit exchange for binary sequence length and value bit are logic one value. To use the switching activity find the allocation with minimal power consumption, the proposed method visits all control steps one by one and determines the allocation with minimal power consumption at each control step. As the existing method, the execution time can be fast according to use the number of operator and max control step. And it is the reduction effect from 6% to 8%.

• 한국정보통신학회논문지
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• 제7권5호
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• pp.1013-1018
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• 2003

본 논문은 이차여자 유도발전기시스템의 파력발전시스템에의 적용에 관한 연구내용을 요약한다. 불규칙적인 파력 입력에 따라 변화하는 발전기의 출력을 슬립주파수에 맞추어 컴퓨터로 이차전류를 제어하여 출력전압과 출력전류를 안정화시키고자 하였다. 본 논문에서 제안한 방법을 확인하기 위하여 실험실 레벨의 파력 시뮬레이터를 제작한 후 이차여자 유도발전기를 구동하였다. 파력과 같은 불규칙입력 발전시스템에 대한 이차여자 유도발전 시스템의 유효성을 실험적으로 확인하였다.

• Journal of Power Electronics
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• 제18권6호
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• pp.1819-1829
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• 2018

A three-phase, three-switch, and three-level boost-type PWM rectifier (Vienna rectifier) is proposed as an active front-end power factor correction (PFC) rectifier for telecom loads. The proposed active front-end PFC rectifier system is modeled by the switching cycle average model. The relation between duty ratios and DC link capacitor voltages is derived in terms of the system input currents. Furthermore, the feasible switching states are identified and applied to the proposed system to reduce the switching stress and DC ripples. A detailed equivalent circuit analysis of the proposed front-end PFC rectifier is conducted, and its performance is verified through simulations in MATLAB. Simulation results are verified using an experimental setup of an active front-end PFC rectifier that was developed in the laboratory. Simulation and experimental results demonstrate the improved power quality parameters that are in accordance with the IEEE and IEC standards.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2016년도 전력전자학술대회 논문집
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• pp.151-152
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• 2016

This paper presents a neutral point deviation compensating control algorithm applied to a 3-level NPC converter under generalized unbalanced ac input conditions. The neutral point deviation is analyzed with a focus on the current flowing out of or into the neutral point of the dc-link in 3-level NPC converter. The model of neutral point deviation and neutral current are also constructed. The positive and negative sequence components of the pole voltages and ac input currents are employed to accurately explain the behavior of 3-level NPC converter and its impact on neutral point deviation. This paper includes the harmonic characteristic of neutral point current under various imbalance AC operating conditions.

• 전력전자학회논문지
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• 제24권6호
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• pp.406-410
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• 2019

Three-level (3L) DC-DC converters are appropriate for high-input-voltage applications. Although the voltage stress of TL converter switches can be reduced to half of the input voltage, the primary side has a large circulating current, which degrades efficiency. In this study, a dual half-bridge cascaded TL converter is presented to reduce this circulating current and thus decrease the conduction loss of the primary circuit. Moreover, the proposed converter can reduce the voltage stress of rectifier diodes, thereby reducing their conduction loss. Therefore, efficiency can be improved by reducing the conduction loss of the primary circuit and rectifier diodes.