• 제목/요약/키워드: Input power level

검색결과 585건 처리시간 0.036초

상위 레벨 합성을 위한 저 전력 스케줄링 및 자원할당 알고리즘 (A Low Power Resource Allocation and Scheduling Algorithm for High Level Synthesis)

  • 신무경;인치호
    • 정보처리학회논문지A
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    • 제8A권3호
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    • pp.279-286
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    • 2001
  • 본 논문은 상위 레벨 합성 과정에서 DSP와 같은 회로를 대상으로 전력소모를 최소로 하는 스케줄링 및 자원할당 알고리즘을 제안한다. 본 논문에서는 스케줄링 시의 저 전력 설계는 리스트 스케줄링 방법을 이용한다. 그리고 자원공유를 통하여 자원할당 시 입력을 재 사용할 수 있는 가능성을 증가시킨다. 스케줄링 후 자원할당 방법은 두 입력 사이의 평균 해밍 거리와 교환동작을 계산한 결과값을 고려하여 전력 함수를 이용한다. 먼저 두 연산자 사이의 평균 해밍 거리를 계산한 후 입력 값에 대한 교환동작을 구하며, 입력 값의 비트 패턴을 이용하여 전력 값을 구한다. 자원 할당 과정은 제어 단계를 한 단계 씩 증가시키면서 각 제어 단계에서 할당 될 수 있는 모든 경우들에 대하여 평균 해밍 거리가 가장 적고 전력 함수에 의한 전력이 가장 적게 소비되는 연산자를 할당한다. 기존 방법과 비교했을 때 그 수행속도는 사용하는 연산자의 개수와 최다 제어 단계에 따라서 빨라진다. 그리고 소모하는 전력이 6%에서 8%까지 감소효과가 있었다.

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Power Flow Control of Four Channel Resonant Step-Down Converters

  • Litvani, Lilla;Hamar, Janos
    • Journal of Power Electronics
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    • 제19권6호
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    • pp.1393-1402
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    • 2019
  • This paper proposes a new power flow control method for soft-switched, four channel, five level resonant buck dc-dc converters. These converters have two input channels, which can be supplied from sources with identical or different voltages, and four output channels with arbitrary output voltages. They are specially designed to supply multilevel inverters. The design methodology for their power flow control has been developed considering a general case when the input voltages, output voltages and loads can be asymmetrical. A special emphasize is paid to the limitations and restrictions of operation. The theoretical studies are confirmed by numerical simulations and laboratory tests carried out at various operation points. Exploiting the advantages of the newly proposed power control strategy, the converter can supply five level inverters in dc microgrids, active filters, power factor correctors and electric drives. They can also play an interfacing role in renewable energy systems.

Design of a 6-bit 500MS/s CMOS A/D Converter with Comparator-based Input Voltage Range Detection Circuit

  • Dae, Si;Yoon, Kwang Sub
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권6호
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    • pp.706-711
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    • 2014
  • A low power 6-bit flash ADC that uses an input voltage range detection algorithm is described. An input voltage level detector circuit has been designed to overcome the disadvantages of the flash ADC which consume most of the dynamic power dissipation due to comparators array. In this work, four digital input voltage range detectors are employed and each input voltage range detector generates the specific clock signal only if the input voltage falls between two adjacent reference voltages applied to the detector. The specific clock signal generated by the detector is applied to turn the corresponding latched comparators on and the rest of the comparators off. This ADC consumes 68.82 mW with a single power supply of 1.2V and achieves 4.3 effective number of bits for input frequency up to 1 MHz at 500 MS/s. Therefore it results in 4.6 pJ/step of Figure of Merit (FoM). The chip is fabricated in 0.13-um CMOS process.

a- Si:H TFT Level Shifter with Reduced Number of Power

  • Jeong, Nam-Hyun;Chun, Young-Tea;Kim, Jung-Woo;Bae, Byung-Seong
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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    • pp.20-23
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    • 2008
  • We proposed a-Si:H TFT (hydrogenated amorphous silicon thin film transistor) level shifter which reduced number of power sources. To reduce the number of power sources from four to two, modified bootstrapped inverter was used for the level shifter. The shift register was verified by PSPICE circuit simulation and fabricated. The fabricated level shifter successfully shifted low input (0 to 5 V) to high level output (-7 to 23 V).

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Predistorter를 이용한 전력증폭기의 선형화에 관한 연구 (Linearizing of RF Power Amplifier Using a Predistorter)

  • 오규태;김정선
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 하계종합학술대회 논문집(1)
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    • pp.145-148
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    • 2002
  • This paper has been studied a predistorter which is able to linierizing of RF amplifier using schottkey. If input signal level is low, input signal is delivered directly. And if input signal level is high, input signal Is delivered with decreasing. So RF amplifier always works at saturation region .When this predistorter is used to simplified C-class RF amplifier, we have concluded that efficiency is improved about 3%.

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위상 왜곡에 의한 무선 LAN용 전력증폭기 ACPR 특성 (ACPR Characteristics of wireless LAN Power Amplifier with AM-to-PM Distortion)

  • 강광희;정성일;구경헌
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 하계종합학술대회 논문집
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    • pp.187-190
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    • 1999
  • In order to predict the effect of power amplifier non-linearity for digital modulated signal, this paper analyses the adjacent channel power ratio(ACPR) with the various AM-to-PM distortion levels. As the phase distortion increases from 0$^{\circ}$ to 12$^{\circ}$ at 1㏈compression point by 2.4$^{\circ}$ step, the input power level which satisfies the required ACPR decreases from 3.5㏈ to 6.5㏈ less than the 1㏈ compression input power.

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An Injection-Locked Based Voltage Boost-up Rectifier for Wireless RF Power Harvesting Applications

  • Lee, Ji-Hoon;Jung, Won-Jae;Park, Jun-Seok
    • Journal of Electrical Engineering and Technology
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    • 제13권6호
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    • pp.2441-2446
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    • 2018
  • This paper presents a radio frequency-to-direct current (RF-to-DC) converter for special RF power harvesting application at 915 MHz. The major featured components of the proposed RF-to-DC converter is the combination of a cross-coupled rectifier and an active diode: first, the cross-coupled rectifier boosts the input voltage to desired level, and an active diode blocks the reverse current, respectively. A prototype was implemented using $0.18{\mu}m$ CMOS technology, and the performance was proven from the fact that the targeted RF harvesting system's full-operation with higher power efficiency; even if the system's input power gets lower (e.g., from nominal 0 to min. -12 dBm), the proposed RF-to-DC converter constantly provides 1.47 V, which is exactly the voltage level to drive follow up system components like DC-to-DC converter and so on. And, maximum power conversion efficiency is 82 % calculated from the 0 dBm input power, 2.3 mA load current.

Novel Buck Mode Three-Level Direct AC Converter with a High Frequency Link

  • Li, Lei;Guan, Yue;Gong, Kunshan;Li, Guangqiang;Guo, Jian
    • Journal of Power Electronics
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    • 제18권2호
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    • pp.407-417
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    • 2018
  • A novel family of Buck mode three-level direct ac converters with a high frequency link is proposed. These converters can transfer an unsteady high ac voltage with distortion into a regulated sinusoidal voltage with a low THD at the same frequency. The circuit configuration is constituted of a three-level converter, high frequency transformer, cycloconverter, as well as input and output filters. The topological family includes forward, push-pull, half-bridge, and full-bridge modes. In order to achieve a reliable three-level ac-ac conversion, and to overcome the surge voltage and surge current of the cycloconverter, a phase-shifted control strategy is introduced in this paper. A prototype is presented with experimental results to demonstrate that the proposed converters have five advantages including high frequency electrical isolation, lower voltage stress of the power switches, bi-directional power flow, low THD of the output voltage, and a higher input power factor.

A Study of AC-DC PWM Full-Bridge Integrated Converter Topologies

  • Gerry, Moschopoulos;Praveen Jain
    • Journal of Power Electronics
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    • 제1권2호
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    • pp.107-116
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    • 2001
  • Two AC-DC PWM full-bridge converters that can input current to improve input power factor while performing dc-dc conversion are investigated in this paper. Both converters are simple in that they are similar to the standard PWM full-bridge converter with a diode rectifier/LC low-pass filter input, and both can operate with a simple method of PWM control. In the paper, the operation of the converters is explained and their steady-state characteristics are discussed. The feasibility of the converters and their ability to meet EN61000-3-2 Class D Standards for electrical equipment are shown with results obtained from experimental prototypes. The performance of both converters in terms of dc bus voltage level, input power factor and efficiency is compared and discussed.

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Distortion Elimination for Buck PFC Converter with Power Factor Improvement

  • Xu, Jiangtao;Zhu, Meng;Yao, Suying
    • Journal of Power Electronics
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    • 제15권1호
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    • pp.10-17
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    • 2015
  • A quasi-constant on-time controlled buck front end in combined discontinuous conduction mode and boundary conduction mode is proposed to improve power factor (PF).When instantaneous AC input voltage is lower than the output bus voltage per period, the buck converter turns into buck-boost converter with the addition of a level comparator to compare input voltage and output voltage. The gate drive voltage is provided by an additional oscillator during distortion time to eliminate the cross-over distortion of the input current. This high PF comes from the avoidance of the input current distortion, thereby enabling energy to be delivered constantly. This paper presents a series analysis of controlling techniques and efficiency, PF, and total harmonic distortion. A comparison in terms of efficiency and PF between the proposed converter and a previous work is performed. The specifications of the converter include the following: input AC voltage is from 90V to 264V, output DC voltage is 80V, and output power is 94W.This converter can achieve PF of 98.74% and efficiency of 97.21% in 220V AC input voltage process.