• Korean Chemical Engineering Research
• /
• v.50 no.6
• /
• pp.1015-1020
• /
• 2012

Lignite of low rank coal and petroleum coke of high sulfur content can be high potential energy sources for coal gasification process because of their plentiful supply. The steam gasification of lignite, anthracite, and pet coke has been carried out in both an atmospheric thermobalance reactor and a lab-scale fludized bed reactor (0.02 m i.d. ${\times}$ 0.6 m height). The effects of gasification temperature ($600{\sim}900^{\circ}C$) and partial pressure of steam (0.15~0.95 atm) on the gasification rate and on the heating value of product gas have been investigated. The modified volumetric reaction model was applied to the experimental data to describe the behavior of carbon conversion, and to evaluate kinetic parameters of char gasification. The results shows that higher temperature bring more hydrogen in the product syngas, and thus increased gas heating value. The feed rate of steam is needed to be optimized because an excess steam input would lower the gasification temperature which results in a degradation of fuel quality. The rank of calorific value of the product gas was anthracite > lignite > pet coke. Their obtained calorific value at $900^{\circ}C$ with 95% steam feed were 10.0 > 6.9 > 5.7 $MJ/m^3$. This study indicates that lignite and pet coke has a potential in fuel gas production.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.24 no.9B
• /
• pp.1742-1754
• /
• 1999

In this paper, we propose a rate control scheme, using histogram based rate-distortion (R-D) estimation, which produces a consistent picture quality between consecutive frames. The histogram based R-D estimation used in our rate control scheme offers a closed-form mathematical model that enable us to predict the bits and the distortion generated from an encoded frame at a given quantization parameter (QP) and vice versa. The most attractive feature of the R-D estimation is low complexity of computing the R-D data because its major operation is just to obtain a histogram or weighted histogram of DCT coefficients from an input picture. Furthermore, it is accurate enough to be applied to the practical video coding. Therefore, the proposed rate control scheme using this R-D estimation model is appropriate for the applications requiring low delay and low complexity, and controls the output bit-rate ad quality accurately. Our rate control scheme ensures that the video buffer do not underflow and overflow by satisfying the buffer constraint and, additionally, prevents quality difference between consecutive frames from exceeding certain level by adopting the distortion constraint. In addition, a consistent considering the maximum tolerance BER of the voice service. Also in Rician fading channel of K=6 and K=10, considering CLP=$10^{-3}$ as a criterion, it is observed that the performance improment of about 3.5 dB and 1.5 dB is obtained, respectively, in terms of $E_b$/$N_o$ by employing the concatenated FEC code with pilot symbols.

• KDI Journal of Economic Policy
• /
• v.12 no.1
• /
• pp.3-29
• /
• 1990

Korean input-output tables for 1975 and 1985 are first deflated into 1975 constant domestic prices(hypothetical terms), and the constant price I-O data are used to decompose the sources of industrial growth and structural change during the 1975-85 period. Using the same methodology, our results for the 1975-85 period are then linked to the results for the earlier period(1955-75) in order to analyze and evaluate the "demand-side" sources of industrialization over the past three decades. The results from the decomposition of the whole economy indicate that over three decades(1955-85) the relative contribution of domestic demand expansion (DDE) to growth and structural change has continuously declined while the contribution of export expansion(EE) has generally continued to rise. The contribution of import-substitution(IS) which had been significantly higher than that of EE during 1955-63 declined substantially, remaining at an insignificantly low level during the period following 1963. Although it is well known that the government's industrial policy in the 1970s emphasized import-substitution in heavy and chemical industries, no significant changes in the export-oriented growth pattern could be observed even for that period, except for a minor decline in the relative contribution of EE. This may be attributed to the substantially larger, backward-linkage effects of EE than that of IS. The sources-of-growth decompositions for major branches of the manufacturing sector generally support the major conclusions derived from the decomposition for the whole economy. The IS contribution which had been significantly high in almost all manufacturing branches during the 1955-63 period declined to low levels in all but two branches, heavy industry and machinery, during the following period. On the other hand, the relative contribution of EE showed a continuous rise in almost all manufacturing branches(except food processing). Finally, the sources of growth for 1975-85 which were decomposed by detailed sub branches, are analyzed by correlating them with changes in relative prices and industrial protection rates by sub-branches for the same period. A major result is that contrary to general expectations, the EE contributions by sub-branch are not negatively correlated with the nominal rates of protection and/or the effective rates of protection for the same sub-branches. It is also found that no statistically significant, positive correlation exists between IS contributions and nominal protection rates or effective protection rates. These unexpected results may be explained by the peculiar nature of the Korean system of industrial incentives for the past period.

• Journal of the Korean Institute of Intelligent Systems
• /
• v.22 no.1
• /
• pp.62-68
• /
• 2012

Steady-State Visually Evoked Potentials (SSVEP) are natural response signal associated with the visual stimuli with specific frequency. By using SSVEP, occipital lobe region is electrically activated as frequency form equivalent to stimuli frequency with bandwidth from 3.5Hz to 75Hz. In this paper, we propose an experimental paradigm for analyzing EEGs based on the properties of SSVEP. At first, an experiment is performed to extract frequency feature of EEGs that is measured from the image-based visual stimuli associated with specific objective with affordance and object-related affordance is measured by using mirror neuron system based on the frequency feature. And then, linear discriminant analysis (LDA) method is applied to perform the online classification of the objective pattern associated with the EEG-based affordance data. By using the SSVEP measurement experiment, we propose a Brain-Computer Interface (BCI) system for recognizing user's inherent intentions. The existing SSVEP application system, such as speller, is able to classify the EEG pattern based on grid image patterns and their variations. However, our proposed SSVEP-based BCI system performs object pattern classification based on the matters with a variety of shapes in input images and has higher generality than existing system.

• Journal of the Korean Geographical Society
• /
• v.49 no.3
• /
• pp.405-422
• /
• 2014

Two important issues in hedonic model are to specify accurate model and delineate submarkets. While the former has experienced much improvement over recent decades, the latter has received relatively little attention. However, the accuracy of estimates from hedonic model will be necessarily reduced when the analysis does not adequately address market segmentation which can capture the spatial scale of price formation process in real estate. Placing emphasis on improvement of performance in hedonic model, this paper tried to segment real estate markets in Gangnam-gu and Jungrang-gu, which correspond to most heterogeneous and homogeneous ones respectively in 25 autonomous districts of Seoul. First, we calculated variable coefficients from mixed geographically weighted regression model (mixed GWR model) as input for clustering, since the coefficient from hedonic model can be interpreted as shadow price of attributes constituting real estate. After that, we developed a spatially constrained data-driven methodology to preserve spatial contiguity by utilizing the SKATER algorithm based on a minimum spanning tree. Finally, the performance of this method was verified by applying a multi-level model. We concluded that submarket does not exist in Jungrang-gu and five submarkets centered on arterial roads would be reasonable in Gangnam-gu. Urban infrastructure such as arterial roads has not been considered an important factor for delineating submarkets until now, but it was found empirically that they play a key role in market segmentation.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.18 no.1
• /
• pp.57-68
• /
• 1993

In this paper, we describe a multiprocessor system using the HiPi bus with pended protocol and multiple cache memories, and evalute the performance of the multiprocessor system in terms of processor utilization for various cache coherence protocols. The HiPi bus is delveloped as the shared bus of TICOM II which is a main computer system to establish a nation-wide computing network in ETRI. The HiPi bus has high data transfer rate, but it doesn't allow cache-to-cache transfer. In order to evaluate the effect of cache-to-cache transfer upon the performance of system and to choose a best-performed protocol for HiPi bus, we simulate as follows: First, we analyze the performance of multiprocessor system with HiPi bus in terms of processor utilizatIOn through simulation. Each of cache coherence protocol is described by state transition diagram, and then the probability of each state is calculated by Markov steady state. The calculated probability of each state is used as input parameters of simulation, and modeling and simulation are implemented and performed by using SLAM II graphic symbols and language. Second, we propose the HiPi bus which supports cache-to-cache transfer, and analyze the performance of multiprocessor system with proposed HiPi bus in terms of processor utilization through simulation. Considered cache coherence protocols for the simulation are Write-through, Write-once, Berkely, Synapse, Illinois, Firefly, and Dragon.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.29 no.1C
• /
• pp.102-110
• /
• 2004

In this paper, we propose a VLSI structure of real-time image compression and reconstruction processor using 2-D discrete wavelet transform and implement into a hardware which use minimal hardware resource using ASIC library. In the implemented hardware, Data path part consists of the DWT kernel for the wavelet transform and inverse transform, quantizer/dequantizer, the huffman encoder/huffman decoder, the adder/buffer for the inverse wavelet transform, and the interface modules for input/output. Control part consists of the programming register, the controller which decodes the instructions and generates the control signals, and the status register for indicating the internal state into the external of circuit. According to the programming condition, the designed circuit has the various selective output formats which are wavelet coefficient, quantization coefficient or index, and Huffman code in image compression mode, and Huffman decoding result, reconstructed quantization coefficient, and reconstructed wavelet coefficient in image reconstructed mode. The programming register has 16 stages and one instruction can be used for a horizontal(or vertical) filtering in a level. Since each register automatically operated in the right order, 4-level discrete wavelet transform can be executed by a programming. We synthesized the designed circuit with synthesis library of Hynix 0.35um CMOS fabrication using the synthesis tool, Synopsys and extracted the gate-level netlist. From the netlist, timing information was extracted using Vela tool. We executed the timing simulation with the extracted netlist and timing information using NC-Verilog tool. Also PNR and layout process was executed using Apollo tool. The Implemented hardware has about 50,000 gate sizes and stably operates in 80MHz clock frequency.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.21 no.12
• /
• pp.3235-3245
• /
• 1996

A DDFS(Direct Digital Frequency Synthesizer) used in spread spectrum communication systems must need fast switching speed, high resolution(the step size of the synthesizer), small size and low power. The chip has been designed with four parallel sine look-up table to achieve four times throughput of a single DDFS. To achieve a high processing speed DDFS chip, a 24-bit pipelined CMOS technique has been applied to the phase accumulator design. To reduce the size of the ROM, each sine ROM of the DDFS is stored 0-.pi./2 sine wave data by taking advantage of the fact that only one quadrant of the sine needs to be stored, since the sine the sine has symmetric property. And the 8 bit of phase accumulator's output are used as ROM addresses, and the 2 MSBs control the quadrants to synthesis the sine wave. To compensate the spectrum purity ty phase truncation, the DDFS use a noise shaper that structure like a phase accumlator. The system input clock is divided clock, 1/2*clock, and 1/4*clock. and the system use a low frequency(1/4*clock) except MUX block, so reduce the power consumption. A 107MHz DDFS(Direct Digital Frequency Synthesizer) implemented using 0.8.mu.m CMOS gate array technologies is presented. The synthesizer covers a bandwidth from DC to 26.5MHz in steps of 1.48Hz with a switching speed of 0.5.mu.s and a turing latency of 55 clock cycles. The DDFS synthesizes 10 bit sine waveforms with a spectral purity of -65dBc. Power consumption is 276.5mW at 40MHz and 5V.

• Journal of the Korea Institute of Building Construction
• /
• v.16 no.6
• /
• pp.505-512
• /
• 2016

Even though high performance concrete was developed according to the trend of bigger and higher of reinforced concrete building, the rheological evaluations such as viscosity, yield stress are not enough to use as input data to accomplish the numerical analysis for the construction design. So there are many problems in the harden concrete such as poor compaction, rock pocket and crack, etc. in the field. In this study, consistency curves were measured by the viscometer as hydration reaction time passed. At the same time the slump flow test and Vicat setting test were carried out for comparing with the results of rheological properties. The fluidity of the W/B 30% decreased as the increase of replacement ratio of blast furnace slag. But in case of W/B 40%, the replacement ration did not significantly influenced to the slump flow value with the passage of hydration time. By the replacement of blast furnace slag to cement, initial setting was delayed and the time gap between initial and final setting became shorten. Through the regression analysis using Bingham model, there are a sudden changes of viscosity and yield stress around initial setting in case of low W/B 30%. The increase of workability by the change of free water in cement paste was offset by the coating effect of impermeable layer in case of W/B 40%.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.39B no.12
• /
• pp.831-841
• /
• 2014

The attacker can access the RFID systems illegally because authentication operation on the RFID systems are performed in wireless communication. Authentication methods based on the PUF were presented to defend attacks. Because of Hash and AES, the cost is expensive for the low-cost RFID tag. In this paper, the PUF-based encryption processor and the mutual authentication protocol are proposed for low-cost RFID authentication. The challenge-response pairs (PUF's input and output) are utilized as the authentication key and encrypted by the PUF's characteristics. The encryption method is changed each session and XOR operation with random number is utilized. Therefore, it is difficult for the attacker to analyze challenge-response pairs and attack the systems. In addition, the proposed method with PUF is strong against physical attacks. And the method protects the tag cloning attack by physical attacks because there is no authentication data in the tag. Proposed processor is implemented at low cost with small footprint and low power.