• Proceedings of the Earthquake Engineering Society of Korea Conference
• /
• 2005.03a
• /
• pp.513-520
• /
• 2005

An active modal-fuzzy control method using hydraulic actuators is presented for seismic response reduction. In the proposed control system, a new fuzzy controller designed in the modal space produces the desired active control force. This type controller has all advantages of the fuzzy control algorithm and modal approach. Since it is very difficult to select input variables used in fuzzy controller among an amount of state variables in the active fuzzy control system, the presented algorithm adopts the modal control algorithm which is able to consider more easily information of all state variables in civil structures that are usually dominated by first few modes. In other words, all information of the whole structure can be considered in the control algorithm evaluated to reduce seismic responses and it can be efficient for especially civil structures. In addition, the presented algorithm is expected to magnify utility and performance caused by efficiency that the fuzzy algorithm can handle complex model more easily. An active modal-fuzzy control scheme is applied together with a Kalman filter and a low-pass filter to be applicable to real civil structures. A Kalman filter is considered to estimate modal states and a low-pass filter was used to eliminate spillover problem. The results of the numerical simulations for a wide amplitude range of loading conditions show that the proposed active modal-fuzzy control system can be beneficial in reducing seismic responses of civil structures.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.13 no.6
• /
• pp.1200-1207
• /
• 2009

The GMDH(Group Method of Data Handling) algorithm can be used to model the complex nonlinear systems. The traditional GMDH algorithm produces the output of the system model in the output layer through the input layer and the intermediate layers as the prescribed process. The outputs of each layer are produced only by the outputs of the former layer. However among the inputs there may be the inputs which can influence the modeling result more than the other inputs. Therefore in this paper the method which improve the modeling capability by interlayer connection of more influential inputs is proposed. The capability improvement of the proposed algorithm compared to the traditional algorithm is verified through computer simulation.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.35 no.11A
• /
• pp.1027-1037
• /
• 2010

In this paper, we propose the linear interpolation-based BD (Block Diagonalization) precoding approximation algorithm for low complexity in downlink multiuser MIMO-OFDM (Multiple-input Multiple-output Orthogonal Frequency Division Multiplexing) systems. In the case of applying the general BD precoding algorithm to multiuser MIMO-OFDM systems, the computational complexity increases in proportional to the number of subcarriers. The proposed interpolation-based BD precoding approximation algorithm can be achieved similar SER performance with general BD algorithm and can decrease the computational complexity. It is proved that proposed algorithm can achieve the significantly decreased computational complexity by computer simulation.

• Journal of the Korean Society for Library and Information Science
• /
• v.37 no.4
• /
• pp.69-88
• /
• 2003

This study intends to develop a new duplicate detection algorithm to improve database quality. The new algorithm is developed to analyze by variables of language and bibliographic type, and it checks elements in bibliographic data not just MARC fields. The algorithm computes the degree of similarity and the weight values to avoid possible elimination of records by simple input error. The study was peformed on the 7,649 newly uploaded records during the last one year against the 210,000 sample master database. The findings show that the new algorithm has improved the duplicates recall rate by 36.2%.

• Journal of Korea Society of Digital Industry and Information Management
• /
• v.10 no.1
• /
• pp.1-6
• /
• 2014

In this paper, we propose a CPLD low power algorithm considering the structure. The proposed algorithm is implemented CPLD circuit FC(Feasible Cluster) for generating a problem occurs when the node being split to overcome the area and power consumption can reduce the algorithm. CPLD to configure and limitations of the LE is that the number of OR-terms. FC consists of an OR node is divided into mainly as a way to reduce the power consumption with the highest number of output nodes is divided into a top priority. The highest number of output nodes with the highest number of switching nodes become a cut-point. Division of the node is the number of OR-terms of the number of OR-terms LE is greater than adding the input and output of the inverter converts the AND. Reduce the level, power consumption and area. The proposed algorithm to MCNC logic circuits by applying a synthetic benchmark experimental results of 13% compared to the number of logical blocks decreased. 8% of the power consumption results in a reduced efficiency of the algorithm represented been demonstrated.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.26 no.12C
• /
• pp.181-189
• /
• 2001

In this thesis, a policing algorithm is proposed, which is one of the traffic management function in ATM networks. The proposed algorithm minimizes CLR(Cell Loss patio) of high priority cells and solves burstiness problem of the traffic caused by multiplexing and demultiplexing process. The proposed algorithm has been implemented with VHDL and is divided into three parts, which are an input module, an UPC module, and an output module. In implementation of the UPC module\`s memory access, memory address is assigned according to VCI\`s LSB(Lowest Significant Byte) of ATM header for convenience. And the error of VSA operation from counter\`s wrap-around can be recovered by the proposed method. ANAM library 0.25 $\mu\textrm{m}$ and design compiler of Synopsys are used for synthesis of the algorithm and Synopsys VSS tool is used for VHDL simulation of it

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2022.05a
• /
• pp.434-436
• /
• 2022

For 4th industrial revolution and the development of various communication media, unmanned and automation are rapidly progressing in various fields. In particular, high-level image processing technology is required in fields such as smart factories, autonomous driving technology, and intelligent CCTV. Accordingly, the importance of preprocessing in a system operating based on an image is increasing, and an algorithm for effectively removing noise from an image is attracting attention. In this paper, we propose a filtering algorithm using noise judgment and a segmentation mask in a complex noise environment. The proposed algorithm calculates the final output by switching the segmentation mask suitable for filtering by performing noise judgment on the pixel values of the input image. Simulation was conducted to verify the performance of the proposed algorithm, and the result image was compared and evaluated with the existing filter algorithm.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.21 no.4
• /
• pp.781-788
• /
• 2017

This paper proposes a new algorithm for comparing amplitude between multiple digital input signals and its digital logic architecture. After simultaneously comparing multiple inputs, the proposed algorithm can provide the information of the largest (or smallest) value among them by using a simple digital logic function. The drawback of the method is to increase hardware resource. To overcome this we propose a reuse method of the overlapped logic operation. The proposed method focuses on enhancing the operational clock frequency, in other words decreasing combinational delay time. After implementing the comparing method with HDL (hardware description language), we experiment on it with environment of Cyclone III EP3C40F324A7 FPGA of Altera Inc. In case of 4 input signals, it can increase the operational speed as mush as 1.66 times with 1.20 times the hardware resource. In case of 8, it can also have 2.29 times the clock frequency and 2.15 times the hardware resource.

• Journal of the Korea Society of Computer and Information
• /
• v.18 no.2
• /
• pp.9-17
• /
• 2013

In this paper, we propose a new multiplication algorithm for two polynomials using primitive polynomial with all 1 of coefficient on finite fields GF($2^m$), and design the multiplier with high-speed parallel input-output module structure using the presented multiplication algorithm. The proposed multiplier is designed $m^2$ same basic cells that have a 2-input XOR gate and a 2-input AND gate. Since the basic cell have no a latch circuit, the multiplicative circuit is very simple and is short the delay time $D_A+D_X$ per cell unit. The proposed multiplier is easy to extend the circuit with large m having regularity and modularity by cell array, and is suitable to the implementation of VLSI circuit.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• v.11 no.12
• /
• pp.6069-6091
• /
• 2017

Augmented Reality (AR) overlays virtual information on real world data, such as displaying useful information on videos/images of a scene. This paper presents an Enhanced AR (EAR) system that displays useful statistical players' information on captured images of a sports game. We focus on the situation where the input image is degraded by strong sunlight. Proposed EAR system consists of an image enhancement technique to improve the accuracy of subsequent player and face detection. The image enhancement is followed by player and face detection, face recognition, and players' statistics display. First, an algorithm based on multi-scale retinex is proposed for image enhancement. Then, to detect players' and faces', we use adaptive boosting and Haar features for feature extraction and classification. The player face recognition algorithm uses boosted linear discriminant analysis to select features and nearest neighbor classifier for classification. The system can be adjusted to work in different types of sports where the input is an image and the desired output is display of information nearby the recognized players. Simulations are carried out on 2096 different images that contain players in diverse conditions. Proposed EAR system demonstrates the great potential of computer vision based approaches to develop AR applications.