• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.10A
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• pp.1571-1578
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• 1999

In this paper, we present the Modulator Channel Card and VLSI chip for the Radio Transceiver Unit (RTU) of direct sequence code division multiple access (DS-CDMA) Wireless Local Loop (WLL) System. The Modulator Channel Card is designed and implemented using ASIC's, FPGA's and DSP's. The ASIC, compliance with Common Air Interface specification proposed by ETRI, has 40K gates which is designed to operate at 32MHz, and is fabricated using $0.6\mu\textrm{m}$ CMOS process. The ASIC carries out for I- or Q- phase data channel signal processing at a time, where each data channel processing consists of channel coding, block interleaving, scrambling, Walsh modulation, Pseudo-Noise (PN) spreading, and baseband filtering. The Modulator Channel Card has been integrated as a part of RTU of WLL system and is confirmed that it meets all functional and performance requirements.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.7
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• pp.1347-1353
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• 2015

We implemented a 10 Gb/s 4-channel vertical cavity surface emission lasers (VCSEL) driver array in a $0.13{\mu}m$ CMOS process technology. To enhance high current resolution, power dissipation, and chip space area, digital APC/AMC with time division sensing technology is primarily adopted. The measured -3 dB frequency bandwidth is 9.2 GHz; the small signal gain is 10.5 dB; the current resolution is 0.01 mA/step, suitable for the wavelength operation up to 10 Gb/s over a wide temperature range. The proposed APC and AMC demonstrate 5 to 20 mA of bias current control and 5 to 20 mA of modulation current control. The whole chip consumes 371 mW of low power under the maximum modulation and bias currents. The active chip size is $3.71{\times}1.3mm^2$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.2C
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• pp.181-187
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• 2012

Millimeter wave (MMW) readily penetrates fabrics, thus it can be used to detect objects concealed under clothing. A passive MMW imaging system can operate as a stand-off type sensor that scans people in both indoors and outdoors. However, because of the diffraction limit and low signal level, the imaging system often suffers from low image quality. Therefore, suitable statistical analysis and computational processing would be required for automatic analysis of the images. In this paper, a real-time concealed object detection is addressed by means of the multi-level segmentation. The histogram of the image is modeled with a Gaussian mixture distribution, and hidden object areas are segmented by a multi-level scheme involving $k$-means, the expectation-maximization algorithm, and a decision rule. The complete algorithm has been implemented in C++ environments on a standard computer for a real-time process. Experimental and simulation results confirm that the implemented system can achieve the real-time detection of concealed objects.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.11C
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• pp.1106-1112
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• 2009

The SC-FDMA(single carrier-frequency division multiple access) was recently adopted as the uplink multiple access scheme from 3GPP LTE(3rd Generation Partnership Project Long Tenn Evolution) due to its low PAPR (Peak-to-averaged power ratio). The bandwidth of IFDMA(interleaved FDMA), one of the sub-carrier mapping methods of SC-FDMA, gets narrower as the roll-off factor of RRC(root raised cosine) filter decreases from 1 to 0, whereas its PAPR can increase significantly. In practice, to increase the power efficiency of an amplifier, signals with high PAPR undergo the process of clipping. Clipping of signals may cause regeneration of high-frequency components as well as distortion of signals. The current paper deals with the effect of clipping on the spectrum and BER of IFDMA signals with RRC filters.

• Journal of the Korea Society of Computer and Information
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• v.15 no.2
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• pp.109-117
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• 2010

Digital watermarking has drawn extensive attention for protecting digital contents from unauthorized copying. This paper proposes a new watermarking scheme in frequency domain for copyright protection of digital audio. In our proposed watermarking system, the original audio is segmented into non-overlapping frames. Watermarks are then embedded into the selected prominent peaks in the magnitude spectrum of each frame. Watermarks are extracted by performing the inverse operation of watermark embedding process. Simulation results indicate that the proposed scheme is robust against various kinds of attacks such as noise addition, cropping, resampling, re-quantization, MP3 compression, and low pass filtering. Our proposed watermarking system outperforms Cox's method in terms of imperceptibility, while keeping comparable robustness with the Cox's method. Our proposed system achieves SNR (signal-to-noise ratio) values ranging from 20 dB to 28 dB. This is in contrast to Cox's method which achieves SNR values ranging from only 14 dB to 23 dB.

• The KIPS Transactions:PartB
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• v.9B no.2
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• pp.199-204
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• 2002

Since motion estimation and motion compensation methods remove the redundant data to employ the temporal redundancy in images, it plays an important role in digital video compression. Because of its high computational complexity, however, it is difficult to apply to high-resolution applications in real time environments. If we have information about the motion of an image block before the motion estimation, the location of a better starting point for the search of an exact motion vector can be determined to expedite the searching process. In this paper, we present an adaptive motion estimation approach bated on temporal correlations of consecutive image frames that defines the search pattern and determines the location of the initial search point adaptively. Through experiments, compared with DS(Diamond Search) algorithm, the proposed algorithm is about 0.1∼0.5(dB) better than DS in terms of PSNR(Peak Signal to Noise Ratio) and improves as high as 50% compared with DS in terms of average number of search point per motion vector estimation.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.10
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• pp.1175-1184
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• 2008

Delay-sum back projection(DSBP) algorithm and the time reversal algorithm based on the finite-difference time-domain method are compared. The two algorithms, which operate in the time domain, can process the ultra-wideband (UWB) radar data to generate images that are close to the original location and shape of the target. For the experiment, the UWB radar consists of a network analyzer, a resistive V dipole antenna, a scanner, and a control computer. The radar aperture is synthesized by linearly scanning the antenna. A calibration procedure is applied to the measured data to remove signal distortion and clutter. The two algorithms are applied to the same data on the same platform. It is shown that the DSBP algorithm produces better images but takes longer time to produce the images than the FDTD-TR algorithm.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.7
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• pp.1442-1447
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• 2004

In this paper, a 6-Bit CMOS Folding and Interpolating AD Converter is presented. The converter is considered to be useful as an integrated part of a VLSI circuit handling both analog and digital signals as in the case of HDD or LAN applications. A built-in analog circuit for VLSI of a high-speed data communication requires a small chip area, low power consumption, and fast data processing. The proposed folding and interpolating AD Converter uses a very small number of comparators and interpolation resistors, which is achieved by cascading a couple of folders working in different principles. This reduced number of parts is a big advantage for a built-in AD converter design. The design is based on 0.25m double-poly 2 metal n-well CMOS process. In the simulation, with the applied 2.5V and a sampling frequency of 500MHz, the measurements are as follows: power consumption of 27mw, INL and DNL of $\pm$0.1LSB, $\pm$0.15LSB each, SNDR of 42dB with an input signal of 10MHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.12
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• pp.2615-2621
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• 2010

The multi-band six-port phase correlator using metamaterial was designed and fabricated in this paper. The lumped metamaterial structure that can process the dual-band receiving signal was analyzed. Based on the analyzed results, the small-sized metamatrial six-port phase correlator for multi-band direct conversion method was proposed and fabricated. Also, the resistive power divider and $90^{\circ}$ hybrid coupler that comprises the six-port phase correlator were implemented based on the scattering parameters of metamatrial six-port phase correlator. The measured results of the proposed six-port phase correlator show the good agreement with simulation results. The performance of the six-port phase correlator shows the reflection loss below -20 dB in the dual-band. Also, the proposed six-port phase correlator got a good transmission characteristic within 1 dB gain difference and ${\pm}4.1^{\circ}$ phase imbalance, respectively.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.10a
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• pp.861-862
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• 2015

In this paper we present a low area 12-bit SAR ADC (Successive Approximation Register Analog-to-Digital Converter). The proposed circuit is fabricated using Magnachip/SK Hynix 1-Poly 6-Metal $0.18-{\mu}m$ CMOS process, and it is powered by a 1.8-V supply. Total chip area is reduced by replacing the MIM capacitors with MOS capacitors instead of the capacitors consisting of overall part in chip area. The proposed circuit showed improved power dissipation of 1.9mW, and chip area of $0.45mm^2$ as compared to conventional research results at the power supply of 1.8V. The designed circuit also showed high SNDR (Signal-to-Noise Distortion Ratio) of 70.51dB, and excellent effective number of bits of 11.4bits.