• Proceedings of the KIPE Conference
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• 2015.11a
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• pp.185-186
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• 2015

This paper introduces general single PLL(Phase Locked Loop) algorithm and compares with proposed PLL method. The suggested PLL uses low pass filter to reduce high harmonics in real grid and uses feed forward method to compensate phase delay of the low pass filter.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.7
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• pp.871-877
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• 2018

In this paper, we propose a triple nested PID control scheme for stable hovering of a quadrotor and propose a complementary filter based sensor fusion technique to improve the performance of attitude, altitude and velocity measurement. The triple nested controller has a structure in which a double nested attitude controller that has the angular velocity PD controller in inner loop and the angular PI controller in outer loop, is nested in a velocity control loop to enable stable hovering even in the case of disturbance. We also propose a sensor fusion technique by applying a complementary filter in order to reduce the noise and drift error included in the acceleration and gyro sensor and to measure the velocity by fusing image, gyro, and acceleration sensor. In order to verity the performance, we applied the proposed control and measurement scheme to hovering control of quadrotor.

• Journal of Power Electronics
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• v.18 no.4
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• pp.1165-1177
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• 2018

This paper investigates the active damping of grid-connected LCL filter resonance using high-pass filter (HPF) of the grid current. An expression for such HPF is derived in terms of the filter components. This expression facilitates a general study of the actively damped filter behavior in the discrete time domain. Limits for the HPF parameters are derived to avoid the excitation of unstable open loop poles since such excitation can reduce both the damping performance and the system robustness. Based on this study, straightforward co-design steps for the active damping loop along with the fundamental current regulator are proposed. A numerical example along with simulation and experimental results are presented to verify the theoretical analyses.

• Journal of Power Electronics
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• v.16 no.1
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• pp.310-318
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• 2016

This paper presents a new orthogonal signals generator (OSG) with DC Offset rejection for implementing a phase locked loop (PLL) in single-phase grid-connected power systems. An adaptive filter (AF) based on the least mean square (LMS) algorithm is used to constitute the OSG in this study. The DC offset in the measured grid voltage signal can be significantly rejected in the developed OSG technique. This generates two pure orthogonal signals that are free from the DC offset. As a result, the DC offset rejection performance of the presented single-phase phase locked loop (SPLL) can be enhanced. A mathematical model of the developed OSG and the principle of the adaptive filter based SPLL (AF-SPLL) are presented in detail. Finally, simulation and experimental results demonstrate the feasibility of the proposed AF-SPLL.

• ETRI Journal
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• v.28 no.5
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• pp.607-614
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• 2006

This paper presents a new class of microstrip slow-wave open-loop resonator filters with reduced size and improved stopband characteristics. A comprehensive treatment of both ends loaded with triangular and rectangular ends is described, leading to the invention of a microstrip slow-wave open-loop resonator. Two-resonator and four-resonator bandpass filters are designed at the operating frequency of about 2 GHz, and a bandwidth of 60 MHz. The size of the slow-wave open-loop resonator is optimized from the standpoint of the unloaded Q-factor. The filters are not only compact in size due to the slow-wave effect, but also have a wider upper stopband resulting from the dispersion effect. The filter designs of this type are described in details. The experimental results are demonstrated and discussed.

• Journal of Electrical Engineering and Technology
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• v.4 no.3
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• pp.405-409
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• 2009

A polarization-independent multiwavelength-switchable fiber filter is proposed based on a polarization beam splitter and fiber coupler, which can function as a polarization-independent transmission or reflection-type interleaving filter. The proposed filter consists of a polarization beam splitter and a Sagnac birefringence loop composed of a 50:50 coupler, high birefringent fibers, and two quarter-wave plates. In the proposed filter, a transmission-type interleaver with a channel isolation > 18 dB or a reflection-type one with a channel isolation of ${\sim}3$ dB, whose channel spacing and switching displacement were 0.8 and 0.4 nm in common, respectively, could be obtained. A channel interleaving operation could be performed by the proper control of waveplates within the Sagnac birefringence loop.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.11
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• pp.2009-2014
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• 2017

A novel structure of phase locked loop (PLL) with a time constant comparator and a current compensator has been proposed. The proposed PLL uses small capacitors which are impossible for stable operation in a conventional PLL. It is small enough to be integrated into a single chip. The time constant comparator detects the loop filter output voltage variations using signals which are passed through small and large RC time constants. The signal from the large RC time constant node is the average of the loop filter output voltage. The output voltage of another node is approximately equal to the present loop filter voltage. The output of the time constant comparator controls a current compensator and charge/discharge small size loop filter capacitors. It makes the proposed PLL operate stably. It has been simulated and proved by HSPICE in a CMOS $0.18{\mu}m$ 1.8V process.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2000.12a
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• pp.165-168
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• 2000

In this paper, we propose a method, an optimized architecture of a device with an image signal process of a field unit to minimize the flick phenomenon that happens in direction of a color temperature at a color tone change. The proposed IIR loop filter has an optimized architecture and reduced hardware compared with previous filters. In order to achieve the optimization for the hardware complexity. It is designed by time-multiplexing architecture. The proposed IIR loop filter is synthesized by using the STD90 0.35um cell library.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.4
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• pp.811-818
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• 2016

A continuous fine-tuning phase locked loop with an additional negative feedback loop has been proposed. When the phase locked loop is out-of-lock, the phase locked loop has a fast locking characteristic using the continuous band-selection loop. When the phase locked loop is near in-lock, the bandwidth is narrowed with the fine loop. The additional negative feedback loop consists of a voltage controlled oscillator, a frequency voltage converter and its internal loop filter. It serves a negative feedback function to the main phase locked loop, and improves the phase noise characteristics and the stability of the proposed phase locked loop. The additional negative feedback loop makes the continuous fine-tuning loop work stably without any voltage fluctuation in the loop filter. Measurement results of the fabricated phase locked loop in $0.18{\mu}m$ CMOS process show that the phase noise is -109.6dBc/Hz at 2MHz offset from 742.8MHz carrier frequency.

• Journal of the Korean Society for Precision Engineering
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• v.16 no.3 s.96
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• pp.154-163
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• 1999

In this paper, an ultra precision positioning system has been developed using dual servo loop control. For positioning system having long distance with ultra precision , the combination of global stage and micro stage was required. A servo motor based ball screw is used as a global stage and the piezo actuator as a micro stage. For the improvement of positional precision, the digital Chebyshev filter is implemented in the developed to dual servo system. Therefore, the positional repeatability has been achieved within ${\pm}$ 10 mm, and this technique can be applied to develop precision semiconductor equipments such as lithography steppers and probers.