• Title/Summary/Keyword: Imprint Process

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Optical Packaging and Interconnection Technology (광 패키징 및 인터커넥션 기술)

  • Kim, Dong Min;Ryu, Jin Hwa;Jeong, Myung Yung
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.4
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    • pp.13-18
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    • 2012
  • By the need for high-speed data transmission in PCB, the studies on the optical PCB has been conducted with optical interconnection and its packaging technology. Particularly, the polymer-based optical interconnection has been extensively studied with the advantages such as cost-effective and ease of process. For high-efficiency and passive alignment, the studies were performed using the 45 degree mirrors, MT connector, and etc. In this work, integrated PLC device and fiber alignment array block was fabricated by using imprint technology to solve the alignment and array problem of optical device and the optical fiber. The fabricated integrated block for optical interconnection of PLC device has achieved higher precision of decreasing the dimensional error of the patterns by optimization of process and its insertion loss has an average value of 4.03dB, lower than criteria specified by international standard. In addition, a optical waveguide with built-in lens has been proposed for high-efficiency and passive alignment. By simulation, it was confirmed that the proposed structure has higher coupling efficiency than conventional no-lens structure and has the broad tolerance for the spatial offset of optical waveguide.

Facile Fabrication Process for Graphene Nanoribbon Using Nano-Imprint Lithography(NIL) and Application of Graphene Pattern on Flexible Substrate by Transfer Printing of Silicon Membrane (나노임프린트 리소그래피 기술을 이용한 그래핀 나노리본 트랜지스터 제조 및 그래핀 전극을 활용한 실리콘 트랜지스터 응용)

  • Eom, Seong Un;Kang, Seok Hee;Hong, Suck Won
    • Korean Journal of Materials Research
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    • v.26 no.11
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    • pp.635-643
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    • 2016
  • Graphene has shown exceptional properties for high performance devices due to its high carrier mobility. Of particular interest is the potential use of graphene nanoribbons as field-effect transistors. Herein, we introduce a facile approach to the fabrication of graphene nanoribbon (GNR) arrays with ~200 nm width using nanoimprint lithography (NIL), which is a simple and robust method for patterning with high fidelity over a large area. To realize a 2D material-based device, we integrated the graphene nanoribbon arrays in field effect transistors (GNR-FETs) using conventional lithography and metallization on highly-doped $Si/SiO_2$ substrate. Consequently, we observed an enhancement of the performance of the GNR-transistors compared to that of the micro-ribbon graphene transistors. Besides this, using a transfer printing process on a flexible polymeric substrate, we demonstrated graphene-silicon junction structures that use CVD grown graphene as flexible electrodes for Si based transistors.

A Study on Polymer Replica Materials for Nanotransfer Printing (패턴전사프린팅용 고분자 복제 소재 연구)

  • Kang, Young Lim;Park, Woon Ik
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.34 no.4
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    • pp.262-268
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    • 2021
  • For the past several decades, various next-generation patterning methods have been developed to obtain well-designed nano-to-micro structures, such as imprint lithography, nanotransfer printing (nTP), directed self-assembly (DSA), E-beam lithography, and so on. Especially, nTP process has much attention due to its low processing cost, short processing time, and good compatibility with other patterning techniques in achieving the formation of high-resolution functional patterns. To transfer functional patterns onto desirable substrates, the use of soft materials is required for precise replication of master mold. Here, we introduce a simple and practical nTP method to create highly ordered structures using various polymeric replica materials. We found that polymethyl methacrylate (PMMA), polystyrene (PS), and polyvinylpyridine (PVP) are possible candidates for replica materials for reliable duplication of Si master mold based on systematic analysis of pattern visualization. Furthermore, we successfully obtained well-defined metal and oxide nanostructures with functionality on target substrates by using replica patterns, through deposition and transfer process. We expect that the several candidates of replica materials can be exploited for effective nanofabrication of complex electronic devices.

Viscoelastic Finite Element Analysis of Filling Process on the Moth-Eye Pattern (모스아이 패턴의 충전공정에 대한 점탄성 유한요소해석)

  • Kim, Kug Weon;Lee, Ki Yeon;Kim, Nam Woong
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.4
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    • pp.1838-1843
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    • 2014
  • Nanoimprint lithography (NIL) fabrication process is regarded as the main alternative to existing expensive photo-lithography in areas such as micro- and nano-electronics including optical components and sensors, as well as the solar cell and display device industries. Functional patterns, including anti-reflective moth-eye pattern, photonic crystal pattern, fabricated by NIL can improve the overall efficiency of such devices. To successfully imprint a nano-sized pattern, the process conditions such as temperature, pressure, and time should be appropriately selected. In this paper, a cavity-filling process of the moth-eye pattern during the thermal-NIL within the temperature range, where the polymer resist shows the viscoelastic behaviors with consideration of stress relaxation effect of the polymer, were investigated with three-dimensional finite element analysis. The effects of initial thickness of polymer resist and imprinting pressure on cavity-filling process has been discussed. From the analysis results it was found that the cavity filling can be completed within 100 s, under the pressure of more than 4 MPa.

MASK ROM IP Design Using Printed CMOS Process Technology (Printed CMOS 공정기술을 이용한 MASK ROM 설계)

  • Jang, Ji-Hye;Ha, Pan-Bong;Kim, Young-Hee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.788-791
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    • 2010
  • We design 64-bit ROM IP for RFID tag chips using printed CMOS non-volatile memory IP design technology for a printed CMOS process. The proposed 64-bit ROM circuit is using ETRI's $0.8{\mu}m$ CMOS porocess, and is expected to reduce process complexity and cost of RFID tag chips compared to that using a conventional silicon fabrication based on a complex lithography process because the poly layer in a gate terminal is using printing technology of imprint process. And a BL precharge circuit and a BL sense amplifier is not required for the designed cell circuit since it is composed of a transmission gate instead of an NMOS transistor of the conventional ROM circuit. Therefore an output datum is only driven by a DOUT buffer circuit. The Operation current and layout area of the designed ROM of 64 bits with an array of 8 rows and 8 columns using $0.8{\mu}m$ ROM process is $9.86{\mu}A$ and $379.6{\times}418.7{\mu}m^2$.

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Adhesion Characteristics between Stamp and Polymer Materials Used in Thermal Nanoimprint Lithography (열 나노임프린트 리소그래피에서 사용되는 스탬프와 폴리머 재료 사이의 점착 특성)

  • Kim Kwang-Seop;Kang Ji-Hoon;Kim Kyung-Woong
    • Tribology and Lubricants
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    • v.22 no.4
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    • pp.182-189
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    • 2006
  • In this paper, the adhesion characteristics between a fused silica without or with an anti-sticking layer and a thermoplastic polymer film used in thermal NIL were investigated experimentally in order to identify the release performance of the anti-sticking layer. The anti-sticking layers were derived from fluoroalkylsilanes, (1H, 1 H, 2H, 2H-perfluorooctyl)trichlorosilane ($F_{13}-OTS$) and (3, 3, 3-trifluoropropyl)trichlorosilane (FPTS), and coated on the silica surface in vapor phase. The commercial polymers, mr-I 7020 and 8020 (micro resist technology, GmbH), for thermal NIL were spin-coated on Si substrate with a rectangular island which was fabricated by conventional microfabrication process to achieve small contact area and easy alignment of flat contact sur- faces. Experimental conditions were similar to the process conditions of thermal NIL. When the polymer film on the island was separated from the silica surface after imprint process, the adhesion force between the silica surface and the polymer film was measured and the surfaces of the silica and the polymer film after the separation were observed. As a result, the anti-sticking layers remarkably reduced the adhesion force and the surface damage of polymer film and the chain length of silane affects the adhesion characteristics. The anti-sticking layers derived from FPTS and $F_{13}-OTS$ reduced the adhesion force per unit area to 38% and 16% of the silica sur-faces without an anti-sticking layer, respectively. The anti-sticking layer derived from $F_{13}-OTS$ was more effective to reduce the adhesion, while both of the anti-sticking layers prevented the surface damages of the polymer film. Finally, it is also found that the adhesion characteristics of mr-I 7020 and mr-I 8020 polymer films were similar with each other.

A Study on the design and fabrication of Pluggable Lens for Optical PCB Interconnection (광 PCB 접속용 플러거블 렌즈의 설계 및 제작 연구)

  • Kim, Jung Hoon;Lee, Tae Ho;Kim, Dong Min;Jeong, Myung Yung
    • Journal of the Microelectronics and Packaging Society
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    • v.21 no.1
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    • pp.25-29
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    • 2014
  • In this study, an optical PCB was proposed which can overcome the limitations of the conventional PCB, and a new structure with pluggable lens was considered for a high-efficient passive alignment. The structure was a lens-added optical waveguide for the improvement of misalignment between the lens and the waveguide in the alignment. Also, as it had a barrier-type structure to prevent the surface damage of the lens by desorption, the high-efficient passive alignment can be realized. The structure was designed by optimizing the simulation and the fabrication process of the pluggable lens structure was conducted using the repetitive photolithography and the thermal reflow. The optical waveguide with the lens-integrated pluggable interconnection was fabricated by the imprint process using the polydimethylsiloxane(PDMS) replica mold. Therefore, we confirmed the possibility of pluggable lens-added optical waveguide structure fabrication for high-efficient passive alignment.

Design and Fabrication of Information Security Films with Microlouver Pattern and ZnO Nano-Ink Filling

  • Kim, Gwan Hyeon;Kim, So Won;Lee, Seong Eui;Lee, Hee Chul
    • Journal of the Korean Ceramic Society
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    • v.56 no.4
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    • pp.354-359
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    • 2019
  • Information security films that can ensure personal privacy by reducing the viewing angle of display screens were fabricated by microlouver patterning and a ZnO nano-ink filling process. Optical simulation results demonstrated that all the microlouver films showed good security performances. Security performances were evaluated as calculated relative luminance ratios compared between the side and front. Based on the simulation results, microlouver films were fabricated by UV imprint lithography and nano-ink bar coating. However, distortion of the microlouver pattern occurred with the use of high-viscosity nano-inks such as ZrO2 and TiO2, and the CuO-filled microlouver film suffered from very low optical transmittance. Accordingly, the effects of ZnO filling height on security performance were intensively investigated through simulation and experimental measurements. The fabricated microlouver film with a 75-㎛-high ZnO filling exhibited a good relative luminance ratio of 0.75 at a 60° side angle and a transmittance of 44% at a wavelength of 550 nm.

Design and Construction of a Surface Encoder with Dual Sine-Grids

  • Kimura, Akihide;Gao, Wei;Kiyono, Satoshi
    • International Journal of Precision Engineering and Manufacturing
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    • v.8 no.2
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    • pp.20-25
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    • 2007
  • This paper describes a second-generation dual sine-grid surface encoder for 2-D position measurements. The surface encoder consisted of a 2-D grid with a 2-D sinusoidal pattern on its surface, and a 2-D angle sensor that detected the 2-D profile of the surface grid The 2-D angle sensor design of previously developed first-generation surface encoders was based on geometric optics. To improve the resolution of the surface encoder, we fabricated a 2-D sine-grid with a pitch of $10{\mu}m$. We also established a new optical model for the second-generation surface encoder that utilizes diffraction and interference to generate its measured values. The 2-D sine-grid was fabricated on a workpiece by an ultra precision lathe with the assistance of a fast tool servo. We then performed a UV-casting process to imprint the sine-grid on a transparent plastic film and constructed an experimental setup to realize the second-generation surface encoder. We conducted tests that demonstrated the feasibility of the proposed surface encoder model.

A Study on the Improvement of Bibliographical Description Form of the Date of Publication in the Catalog (목록에서 발행사항의 발행년 기술형식의 개선안 연구)

  • Lee, Myounggyu
    • Journal of Korean Library and Information Science Society
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    • v.50 no.1
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    • pp.1-21
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    • 2019
  • The purpose of this study is to expand the functions of the catalog by segmenting the information into a systematic cataloging and reflecting it in the search environment when the amount of information is increased and the user's information needs are disaggregated. So, this study presented the need to look at the process of the descriptive change of the date of publication from the existing cataloging rules, look at the description elements through the current online bookstores, and describe the month of publication as well as the year of publication in the sub-elements of the publication area that may help identify and search for data. It also presented cataloging rules for the month of publication and an example of the description of MARC.