• Speech Sciences
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• v.1
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• pp.295-314
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• 1997

In this study, we will implement a flexible formant analysis and synthesis system. In the analysis part, the two-channel (i.e., speech & EGG signals) approach is investigated for accurate estimation of formant information. The EGG signal is used for extracting exact pitch information that is needed for the pitch synchronous LPC analysis and closed phase LPC analysis. In the synthesis part, Klatt formant synthesizer is modified so that the user can change synthesis parameters arbitarily. Experimental results demonstrate the superiority of the two-channel analysis method over the one-channel(speech signal only) method in analysis as well as in synthesis. The implemented system is expected to be very helpful for studing the effects of synthesis parameters on the quality of synthetic speech and for the development of Korean text-to-speech(TTS) system with the formant synthesis method.

• Wind and Structures
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• v.1 no.2
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• pp.127-144
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• 1998

In this paper, the wake structures behind a square cylinder at the Reynolds number of 22,000 are simulated using the large eddy simulation, and the main features of the wake structure associated with unsteady vortex-shedding are investigated. The Smagorinsky model is used for parametrization of the subgrid scales. The finite element method with isoparametric linear elements is employed in the computations. Unsteady computations are performed using the explicit method with streamline upwind scheme for the advection term. The time integration incorporates a subcycling strategy. No-slip condition is enforced on the wall surface. A comparative study between two-and three-dimensional computations puts a stress on the three-dimensional effects in turbulent flow simulations. Simulated three-dimensional wake structures are compared with numerical and experimental results reported by other researchers. The results include time-averaged, phase-averaged flow fields and numerically visualized vortex-shedding pattern using streaklines. The results show that dynamics of the vortex-shedding phenomenon are numerically well reproduced using the present method of finite element implementation of large eddy simulation.

• Journal of the Korean Institute of Intelligent Systems
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• v.11 no.1
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• pp.22-27
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• 2001

본 논문에서는 복잡한 하이퍼카오스 신호를 발생시키는 HVPM (Hyperchaotic Volume Preserving Maps) 모델의 회로를 제안하고, 보드상에서 구현하고자 한다. 제안한 HVPM 모델은 3차원 이산시간(discrete-time) 연립차분방정식으로 구성되어 있으며, 비선형 사상(maps)과 모듈러(modulus) 함수를 사용하여 랜덤한 카오스 어트랙터(attractor)를 발생시킨다. 이러한 HVPM 모델을 하드웨로 구현하기 위하여 연산 부분은 연산증폭기를 사용하고, 매핑(mapping) 부분은 N형 함수와 비교기를 사용하여 설계한다. 특히, N형의 비선형 함수는 CMOS 전달특성과 선형증폭기의 출력특성을 조합하여 독특하게 구현하였다. 구현한 보드상의 실험에서 카오스 시스템 파라미터 값에 대응하는 가변저항기를 조절하여 비주기적인 하이퍼카오스 신호를 발생시킴을 입증하였다. 또한 출력된 카오스 신호들간의 오실로스코프 사진에서 위상공간(phase space)의 동적응답은 랜덤한 어트랙터를 발생시킴을 확인할 수 있었다.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.9
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• pp.1728-1734
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• 2009

This paper proposes a new power conditioning system for the fuel cell power generation, which consists of a ZVS DC-DC converter and 3-phase inverter. The ZVS DC-DC converter with a digital controller boosts the fuel cell voltage of 26-50V up to 400V, and the grid-tie inverter controls the active power delivered to the grid. The operation of proposed power conditioning system was verified through simulations with PSCAD/EMTDC software. The feasibility of hardware implementation was verified through experimental works with a laboratory prototype, which was built with 1.2kW PEM fuel-cell stack, 1kW DC-DC converter, and 3kW PWM inverter. The proposed system can be utilized to commercialize an interconnection system for the fuel-cell power generation.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• v.2
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• pp.405-410
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• 2006

Future GNSS signal using BOC modulation brings the advantages of positioning accuracy and multipath rejection. However, the BOC signal has an ambiguous autocorrelation function that complicates the process of acquisition. Three techniques that solve the ambiguous problem are BPSK-like, Sub Carrier Phase Cancellation, and Bump Jumping. In this paper, these methods are implemented by means of a DSP/FPGA board. Moreover, an experiment is conducted to examine and compare the performance of these techniques.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.3
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• pp.506-514
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• 1997

In this paper, we implement digital circuit of despreading delay lock loop for GPS receiver. The designed system consists of Epoch signal generator, two 13bit correlators which correlates the received C/A code and the locally generated C/A code in the receiver, the C/A code generator which generates C/A code of selected satellite, and the direct digital clock synthesizer which generates the clock of the C/A code generator to control the phase and clock rate, the clock controller, and the clock divider. The designed circuit has the function of the acquisition and tracking by the autocorrelation characteristics of Gold code. The controller generates each other control signals according to the correlation value. The designed circuit is simulated to verify the logic functional performance. By using the simulator STR-2770 that generates the virtual GPS signal, the deigned FPGA chip is verified the circuit performance.

• Proceedings of the Korea Information Processing Society Conference
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• 2006.11a
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• pp.309-312
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• 2006

In order to highly applying for the GIS. it is necessary to the SDSS that is possible to the systematic spatial analysis with spatial information and attribute information, I studied it for SDSS construction and implementation, and I brought up the phase of the spatial decision support through the case study.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.120-122
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• 2007

A new power quality disturbance generator is proposed. The proposed scheme overcomes the problem of voltage drop of the conventional generator in normal mode. Therefore, the output voltage of the proposed generator is constant in normal mode and the efficiency of the series transformer is improved. The proposed generator has good feature of simple structure, cost effective implementation, high reliability and easy control. The usefulness of the scheme is verified through simulation and experiments.

• Proceedings of the KIEE Conference
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• 2003.07d
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• pp.2678-2680
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• 2003

본 논문에서는 sliding-DFT의 순환구현을 기반한 실시간 위상 측정 앨고리즘을 제시하였다. 종래의 순환형 SDFT 기반 위상 측정 기법은 단일 계수를 사용하기 때문에 계수 근사가 적용되는 하드웨어 구현시 심각한 오차 파급 특성을 나타낸다. 본 논문에서는 순환 구조이면서 회전 위상을 보정을 통해 N-point DFT의 N개의 모든 계수를 적용한 위상 측정 기법을 제시하였고, FPGA 등 하드웨어 구현에 있어서 계수의 유한 비트 근사에 따르는 성능 열화를 해석하였다. 제안한 위상측정 앨고리즘은 실시간 다채널 위상 측정이 가능하도록 FPGA에 구현하였고 동작을 확인하였다.

• Proceedings of the KIEE Conference
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• 1993.07a
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• pp.479-482
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• 1993

A fully balanced differential amplifier can achieve high-gain wide-bandwidth characteristics. And also, Offset PSRR, CMRR and Noise performance of that are excellent, but these merits can be achieved only when the architecture holds fully balanced. Commonly, the fully balanced differential amplifier has a common mode feedback(CMFB) circuit in order to maintain the balance. This paper presents improved characteristics of the CMFB circuit and designs the wide-bandwidth CMOS Op-amp. The unity gain bandwidth of this Op-amp is 50MHz with the load capacitor 2pF, and the value of phase margin is $85^{\circ}$.